[Intel-gfx] [PATCH 29/42] drm/i915: Remove use of crtc->config from intel_dsi.c

[Maarten Lankhorst]

Signed-off-by: Maarten Lankhorst <maarten.lankho...@linux.intel.com>
---
 drivers/gpu/drm/i915/intel_dsi.c | 14 ++++++++------
 1 file changed, 8 insertions(+), 6 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_dsi.c b/drivers/gpu/drm/i915/intel_dsi.c
index 3f28b046751b..ec5f4509dc87 100644
--- a/drivers/gpu/drm/i915/intel_dsi.c
+++ b/drivers/gpu/drm/i915/intel_dsi.c
@@ -692,14 +692,14 @@ static u16 txbyteclkhs(u16 pixels, int bpp, int 
lane_count,
 }
 
 static void set_dsi_timings(struct drm_encoder *encoder,
-                           const struct drm_display_mode *mode)
+                           struct intel_crtc_state *pipe_config)
 {
+       const struct drm_display_mode *mode = &pipe_config->base.adjusted_mode;
        struct drm_device *dev = encoder->dev;
        struct drm_i915_private *dev_priv = dev->dev_private;
-       struct intel_crtc *intel_crtc = to_intel_crtc(encoder->crtc);
        struct intel_dsi *intel_dsi = enc_to_intel_dsi(encoder);
        enum port port;
-       unsigned int bpp = intel_crtc->config->pipe_bpp;
+       unsigned int bpp = pipe_config->pipe_bpp;
        unsigned int lane_count = intel_dsi->lane_count;
 
        u16 hactive, hfp, hsync, hbp, vfp, vsync, vbp;
@@ -752,11 +752,13 @@ static void intel_dsi_prepare(struct intel_encoder 
*intel_encoder)
        struct drm_device *dev = encoder->dev;
        struct drm_i915_private *dev_priv = dev->dev_private;
        struct intel_crtc *intel_crtc = to_intel_crtc(encoder->crtc);
+       struct intel_crtc_state *pipe_config =
+               to_intel_crtc_state(intel_crtc->base.state);
        struct intel_dsi *intel_dsi = enc_to_intel_dsi(encoder);
        struct drm_display_mode *adjusted_mode =
-               &intel_crtc->config->base.adjusted_mode;
+               &pipe_config->base.adjusted_mode;
        enum port port;
-       unsigned int bpp = intel_crtc->config->pipe_bpp;
+       unsigned int bpp = pipe_config->pipe_bpp;
        u32 val, tmp;
        u16 mode_hdisplay;
 
@@ -793,7 +795,7 @@ static void intel_dsi_prepare(struct intel_encoder 
*intel_encoder)
                        mode_hdisplay << HORIZONTAL_ADDRESS_SHIFT);
        }
 
-       set_dsi_timings(encoder, adjusted_mode);
+       set_dsi_timings(encoder, pipe_config);
 
        val = intel_dsi->lane_count << DATA_LANES_PRG_REG_SHIFT;
        if (is_cmd_mode(intel_dsi)) {
-- 
2.1.0

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