On Mon, May 11, 2015 at 04:25:03PM +0200, Maarten Lankhorst wrote:
> Signed-off-by: Maarten Lankhorst <[email protected]>
> ---
> drivers/gpu/drm/i915/intel_dp.c | 33 ++++++++++++++++++---------------
> 1 file changed, 18 insertions(+), 15 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
> index eda1b22c3111..e6876faca7f0 100644
> --- a/drivers/gpu/drm/i915/intel_dp.c
> +++ b/drivers/gpu/drm/i915/intel_dp.c
> @@ -1536,7 +1536,9 @@ static void intel_dp_prepare(struct intel_encoder
> *encoder)
> struct intel_dp *intel_dp = enc_to_intel_dp(&encoder->base);
> enum port port = dp_to_dig_port(intel_dp)->port;
> struct intel_crtc *crtc = to_intel_crtc(encoder->base.crtc);
> - struct drm_display_mode *adjusted_mode =
> &crtc->config->base.adjusted_mode;
> + struct intel_crtc_state *pipe_config =
> + to_intel_crtc_state(crtc->base.state);
> + struct drm_display_mode *adjusted_mode =
> &pipe_config->base.adjusted_mode;
>
> /*
> * There are four kinds of DP registers:
> @@ -1564,7 +1566,7 @@ static void intel_dp_prepare(struct intel_encoder
> *encoder)
> intel_dp->DP |= DP_VOLTAGE_0_4 | DP_PRE_EMPHASIS_0;
> intel_dp->DP |= DP_PORT_WIDTH(intel_dp->lane_count);
>
> - if (crtc->config->has_audio)
> + if (pipe_config->has_audio)
> intel_dp->DP |= DP_AUDIO_OUTPUT_ENABLE;
>
> /* Split out the IBX/CPU vs CPT settings */
> @@ -2504,6 +2506,8 @@ static void intel_enable_dp(struct intel_encoder
> *encoder)
> struct drm_device *dev = encoder->base.dev;
> struct drm_i915_private *dev_priv = dev->dev_private;
> struct intel_crtc *crtc = to_intel_crtc(encoder->base.crtc);
> + struct intel_crtc_state *pipe_config =
> + to_intel_crtc_state(crtc->base.state);
> uint32_t dp_reg = I915_READ(intel_dp->output_reg);
> unsigned int lane_mask = 0x0;
>
> @@ -2532,7 +2536,7 @@ static void intel_enable_dp(struct intel_encoder
> *encoder)
> intel_dp_complete_link_train(intel_dp);
> intel_dp_stop_link_train(intel_dp);
>
> - if (crtc->config->has_audio) {
> + if (pipe_config->has_audio) {
> DRM_DEBUG_DRIVER("Enabling DP audio on pipe %c\n",
> pipe_name(crtc->pipe));
> intel_audio_codec_enable(encoder);
> @@ -2741,6 +2745,8 @@ static void chv_pre_enable_dp(struct intel_encoder
> *encoder)
> struct intel_crtc *intel_crtc =
> to_intel_crtc(encoder->base.crtc);
> enum dpio_channel ch = vlv_dport_to_channel(dport);
> + struct intel_crtc_state *pipe_config =
> + to_intel_crtc_state(intel_crtc->base.state);
> int pipe = intel_crtc->pipe;
> int data, i, stagger;
> u32 val;
> @@ -2782,13 +2788,13 @@ static void chv_pre_enable_dp(struct intel_encoder
> *encoder)
> }
>
> /* Data lane stagger programming */
> - if (intel_crtc->config->port_clock > 270000)
> + if (pipe_config->port_clock > 270000)
> stagger = 0x18;
> - else if (intel_crtc->config->port_clock > 135000)
> + else if (pipe_config->port_clock > 135000)
> stagger = 0xd;
> - else if (intel_crtc->config->port_clock > 67500)
> + else if (pipe_config->port_clock > 67500)
> stagger = 0x7;
> - else if (intel_crtc->config->port_clock > 33750)
> + else if (pipe_config->port_clock > 33750)
> stagger = 0x4;
> else
> stagger = 0x2;
> @@ -4302,7 +4308,7 @@ intel_dp_check_link_status(struct intel_dp *intel_dp)
> if (WARN_ON(!intel_encoder->base.crtc))
> return;
>
> - if (!to_intel_crtc(intel_encoder->base.crtc)->active)
> + if (!intel_encoder->base.crtc->state->active)
> return;
>
> /* Try to read receiver status if the link appears to be up */
> @@ -5255,7 +5261,8 @@ static void intel_dp_set_drrs_state(struct drm_device
> *dev, int refresh_rate)
> struct intel_encoder *encoder;
> struct intel_digital_port *dig_port = NULL;
> struct intel_dp *intel_dp = dev_priv->drrs.dp;
> - struct intel_crtc *intel_crtc = NULL;
> + struct intel_crtc *intel_crtc;
> + struct intel_crtc_state *pipe_config;
> u32 reg, val;
> enum drrs_refresh_rate_type index = DRRS_HIGH_RR;
>
> @@ -5277,6 +5284,7 @@ static void intel_dp_set_drrs_state(struct drm_device
> *dev, int refresh_rate)
set_drrs_state is also called from _disable hooks, which means you need to
pass the right pipe_config explicitly.
-Daniel
> dig_port = dp_to_dig_port(intel_dp);
> encoder = &dig_port->base;
> intel_crtc = to_intel_crtc(encoder->base.crtc);
> + pipe_config = to_intel_crtc_state(intel_crtc->base.state);
>
> if (!intel_crtc) {
> DRM_DEBUG_KMS("DRRS: intel_crtc not initialized\n");
> @@ -5298,11 +5306,6 @@ static void intel_dp_set_drrs_state(struct drm_device
> *dev, int refresh_rate)
> return;
> }
>
> - if (!intel_crtc->active) {
> - DRM_DEBUG_KMS("eDP encoder disabled. CRTC not Active\n");
> - return;
> - }
> -
> if (INTEL_INFO(dev)->gen >= 8 && !IS_CHERRYVIEW(dev)) {
> switch (index) {
> case DRRS_HIGH_RR:
> @@ -5316,7 +5319,7 @@ static void intel_dp_set_drrs_state(struct drm_device
> *dev, int refresh_rate)
> DRM_ERROR("Unsupported refreshrate type\n");
> }
> } else if (INTEL_INFO(dev)->gen > 6) {
> - reg = PIPECONF(intel_crtc->config->cpu_transcoder);
> + reg = PIPECONF(pipe_config->cpu_transcoder);
> val = I915_READ(reg);
>
> if (index > DRRS_HIGH_RR) {
> --
> 2.1.0
>
> _______________________________________________
> Intel-gfx mailing list
> [email protected]
> http://lists.freedesktop.org/mailman/listinfo/intel-gfx
--
Daniel Vetter
Software Engineer, Intel Corporation
http://blog.ffwll.ch
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