On Mon, Jul 06, 2015 at 02:20:00PM +0200, Maarten Lankhorst wrote: > Op 02-07-15 om 04:26 schreef Matt Roper: > > From: Matt Roper <m...@mattrope.com> > > > > In addition to calculating final watermarks, let's also pre-calculate a > > set of intermediate watermark values at atomic check time. These > > intermediate watermarks are a combination of the watermarks for the old > > state and the new state; they should satisfy the requirements of both > > states which means they can be programmed immediately when we commit the > > atomic state (without waiting for a vblank). Once the vblank does > > happen, we can then re-program watermarks to the more optimal final > > value. > > > > v2: Significant rebasing/rewriting. > > > > Signed-off-by: Matt Roper <matthew.d.ro...@intel.com> > > --- > > drivers/gpu/drm/i915/i915_drv.h | 9 +++++ > > drivers/gpu/drm/i915/i915_irq.c | 7 ++++ > > drivers/gpu/drm/i915/intel_display.c | 34 +++++++++++++++- > > drivers/gpu/drm/i915/intel_drv.h | 26 +++++++++---- > > drivers/gpu/drm/i915/intel_pm.c | 75 > > ++++++++++++++++++++++++++++++------ > > 5 files changed, 130 insertions(+), 21 deletions(-) > > > > diff --git a/drivers/gpu/drm/i915/i915_drv.h > > b/drivers/gpu/drm/i915/i915_drv.h > > index 5ad942e..42397e2 100644 > > --- a/drivers/gpu/drm/i915/i915_drv.h > > +++ b/drivers/gpu/drm/i915/i915_drv.h > > @@ -623,6 +623,9 @@ struct drm_i915_display_funcs { > > struct dpll *best_clock); > > int (*compute_pipe_wm)(struct drm_crtc *crtc, > > struct drm_atomic_state *state); > > + void (*compute_intermediate_wm)(struct drm_device *dev, > > + struct intel_crtc_state *newstate, > > + const struct intel_crtc_state > > *oldstate); > > > If this is can't fail anyway could we please do this at runtime instead of > precalculating?
Hm, this is possible to fail, we might not be able to get valid intermediate wms. And therefore it needs to be in the compute phase. -Daniel > > Something like this: > > commit_intermediate_wm > vblank_evade > plane_update > vblank_end > (wait for vblank) > commit_final_wm > > Of course for skylake just hammer in the final wm during vblank evasion. :-) > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@lists.freedesktop.org > http://lists.freedesktop.org/mailman/listinfo/intel-gfx -- Daniel Vetter Software Engineer, Intel Corporation http://blog.ffwll.ch _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/intel-gfx