When reading out hw state for planes we disable inactive planes which in
turn triggers an update of the watermarks. The update depends on the
crtc_clock being set which is done when reading out encoders. Thus
postpone the plane readout until after encoder readout.

This prevents a warning in skl_compute_linetime_wm() where pixel_rate
becomes 0 when crtc_clock is 0.

Signed-off-by: Patrik Jakobsson <[email protected]>
---
 drivers/gpu/drm/i915/intel_display.c | 38 +++++++++++++++++++++---------------
 1 file changed, 22 insertions(+), 16 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_display.c 
b/drivers/gpu/drm/i915/intel_display.c
index 13a6608..73b2d4a 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -15205,27 +15205,25 @@ static bool primary_get_hw_state(struct intel_crtc 
*crtc)
        return !!(I915_READ(DSPCNTR(crtc->plane)) & DISPLAY_PLANE_ENABLE);
 }
 
-static void readout_plane_state(struct intel_crtc *crtc,
-                               struct intel_crtc_state *crtc_state)
+static void intel_sanitize_plane(struct intel_plane *plane)
 {
-       struct intel_plane *p;
        struct intel_plane_state *plane_state;
-       bool active = crtc_state->base.active;
+       struct intel_crtc *crtc;
 
-       for_each_intel_plane(crtc->base.dev, p) {
-               if (crtc->pipe != p->pipe)
-                       continue;
+       plane_state = to_intel_plane_state(plane->base.state);
 
-               plane_state = to_intel_plane_state(p->base.state);
+       if (!plane_state->base.crtc)
+               return;
 
-               if (p->base.type == DRM_PLANE_TYPE_PRIMARY)
-                       plane_state->visible = primary_get_hw_state(crtc);
-               else {
-                       if (active)
-                               p->disable_plane(&p->base, &crtc->base);
+       crtc = to_intel_crtc(plane_state->base.crtc);
 
-                       plane_state->visible = false;
-               }
+       if (plane->base.type == DRM_PLANE_TYPE_PRIMARY) {
+               plane_state->visible = primary_get_hw_state(crtc);
+       } else {
+               if (crtc->base.state->active)
+                       plane->disable_plane(&plane->base, &crtc->base);
+
+               plane_state->visible = false;
        }
 }
 
@@ -15276,7 +15274,6 @@ static void intel_modeset_readout_hw_state(struct 
drm_device *dev)
                }
 
                crtc->base.hwmode = crtc->config->base.adjusted_mode;
-               readout_plane_state(crtc, 
to_intel_crtc_state(crtc->base.state));
 
                DRM_DEBUG_KMS("[CRTC:%d] hw state readout: %s\n",
                              crtc->base.base.id,
@@ -15349,6 +15346,7 @@ intel_modeset_setup_hw_state(struct drm_device *dev)
        enum pipe pipe;
        struct intel_crtc *crtc;
        struct intel_encoder *encoder;
+       struct intel_plane *plane;
        int i;
 
        intel_modeset_readout_hw_state(dev);
@@ -15360,6 +15358,14 @@ intel_modeset_setup_hw_state(struct drm_device *dev)
 
        for_each_pipe(dev_priv, pipe) {
                crtc = to_intel_crtc(dev_priv->pipe_to_crtc_mapping[pipe]);
+
+               for_each_intel_plane(crtc->base.dev, plane) {
+                       if (crtc->pipe != plane->pipe)
+                               continue;
+
+                       intel_sanitize_plane(plane);
+               }
+
                intel_sanitize_crtc(crtc);
                intel_dump_pipe_config(crtc, crtc->config,
                                       "[setup_hw_state]");
-- 
2.1.4

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