From: Ville Syrjälä <[email protected]> Rather than computing on demand, store also the aux data reg offsets under intel_dp.
Signed-off-by: Ville Syrjälä <[email protected]> --- drivers/gpu/drm/i915/intel_dp.c | 49 +++++++++++++++++++++++++++------------- drivers/gpu/drm/i915/intel_drv.h | 1 + 2 files changed, 34 insertions(+), 16 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c index 27df240..0e5f674 100644 --- a/drivers/gpu/drm/i915/intel_dp.c +++ b/drivers/gpu/drm/i915/intel_dp.c @@ -791,7 +791,6 @@ intel_dp_aux_ch(struct intel_dp *intel_dp, struct drm_device *dev = intel_dig_port->base.base.dev; struct drm_i915_private *dev_priv = dev->dev_private; uint32_t ch_ctl = intel_dp->aux_ch_ctl_reg; - uint32_t ch_data = ch_ctl + 4; uint32_t aux_clock_divider; int i, ret, recv_bytes; uint32_t status; @@ -857,7 +856,7 @@ intel_dp_aux_ch(struct intel_dp *intel_dp, for (try = 0; try < 5; try++) { /* Load the send data into the aux channel data registers */ for (i = 0; i < send_bytes; i += 4) - I915_WRITE(ch_data + i, + I915_WRITE(intel_dp->aux_ch_data_reg[i >> 2], intel_dp_pack_aux(send + i, send_bytes - i)); @@ -921,7 +920,7 @@ done: recv_bytes = recv_size; for (i = 0; i < recv_bytes; i += 4) - intel_dp_unpack_aux(I915_READ(ch_data + i), + intel_dp_unpack_aux(I915_READ(intel_dp->aux_ch_data_reg[i >> 2]), recv + i, recv_bytes - i); ret = recv_bytes; @@ -1009,19 +1008,22 @@ intel_dp_aux_transfer(struct drm_dp_aux *aux, struct drm_dp_aux_msg *msg) return ret; } -static uint32_t g4x_aux_ctl_reg(struct drm_i915_private *dev_priv, - enum port port) +static uint32_t g4x_aux_reg(struct drm_i915_private *dev_priv, + enum port port, int index) { - return DP_AUX_CH_CTL(port); + return index < 0 ? DP_AUX_CH_CTL(port) : + DP_AUX_CH_DATA(port, index); } -static uint32_t ilk_aux_ctl_reg(struct drm_i915_private *dev_priv, - enum port port) +static uint32_t ilk_aux_reg(struct drm_i915_private *dev_priv, + enum port port, int index) { if (port == PORT_A) - return DP_AUX_CH_CTL(port); + return index < 0 ? DP_AUX_CH_CTL(port) : + DP_AUX_CH_DATA(port, index); else - return PCH_DP_AUX_CH_CTL(port); + return index < 0 ? PCH_DP_AUX_CH_CTL(port) : + PCH_DP_AUX_CH_DATA(port, index); } /* @@ -1048,13 +1050,28 @@ static enum port skl_porte_aux_port(struct drm_i915_private *dev_priv) } } -static uint32_t skl_aux_ctl_reg(struct drm_i915_private *dev_priv, - enum port port) +static uint32_t skl_aux_reg(struct drm_i915_private *dev_priv, + enum port port, int index) { if (port == PORT_E) port = skl_porte_aux_port(dev_priv); - return DP_AUX_CH_CTL(port); + return index < 0 ? DP_AUX_CH_CTL(port) : + DP_AUX_CH_DATA(port, index); +} + +static void aux_reg_init(struct intel_dp *intel_dp, + uint32_t (*aux_reg)(struct drm_i915_private *dev_priv, + enum port port, int index)) +{ + struct drm_i915_private *dev_priv = to_i915(intel_dp_to_dev(intel_dp)); + enum port port = dp_to_dig_port(intel_dp)->port; + int i; + + intel_dp->aux_ch_ctl_reg = aux_reg(dev_priv, port, -1); + + for (i = 0; i < ARRAY_SIZE(intel_dp->aux_ch_data_reg); i++) + intel_dp->aux_ch_data_reg[i] = aux_reg(dev_priv, port, i); } static void @@ -1074,11 +1091,11 @@ intel_dp_aux_init(struct intel_dp *intel_dp, struct intel_connector *connector) }; if (INTEL_INFO(dev_priv)->gen >= 9) - intel_dp->aux_ch_ctl_reg = skl_aux_ctl_reg(dev_priv, port); + aux_reg_init(intel_dp, skl_aux_reg); else if (HAS_PCH_SPLIT(dev_priv)) - intel_dp->aux_ch_ctl_reg = ilk_aux_ctl_reg(dev_priv, port); + aux_reg_init(intel_dp, ilk_aux_reg); else - intel_dp->aux_ch_ctl_reg = g4x_aux_ctl_reg(dev_priv, port); + aux_reg_init(intel_dp, g4x_aux_reg); intel_dp->aux.name = ddc_name[port]; intel_dp->aux.dev = dev->dev; diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h index 1df6ebf..3fea039 100644 --- a/drivers/gpu/drm/i915/intel_drv.h +++ b/drivers/gpu/drm/i915/intel_drv.h @@ -717,6 +717,7 @@ struct sink_crc { struct intel_dp { uint32_t output_reg; uint32_t aux_ch_ctl_reg; + uint32_t aux_ch_data_reg[5]; uint32_t DP; int link_rate; uint8_t lane_count; -- 2.4.6 _______________________________________________ Intel-gfx mailing list [email protected] http://lists.freedesktop.org/mailman/listinfo/intel-gfx
