On Fri, Sep 04, 2015 at 07:32:58PM -0700, Chandra Konduru wrote:
> This patch swaps src width and height for dbuf/wm calculations
> when rotation is 90/270 as per hw requirements.
> 
> v2:
> - minor/cosmetic changes, removed plane_state check kludge (Ville)
> 
> Signed-off-by: Chandra Konduru <chandra.kond...@intel.com>

Spec wasn't entirely clear on when to swap IIRC, but the idea makes
sense in most cases at least, so
Reviewed-by: Ville Syrjälä <ville.syrj...@linux.intel.com>

> ---
>  drivers/gpu/drm/i915/intel_pm.c |   28 ++++++++++++++++++++++++----
>  1 file changed, 24 insertions(+), 4 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
> index 4d3aca0..8a36ab9 100644
> --- a/drivers/gpu/drm/i915/intel_pm.c
> +++ b/drivers/gpu/drm/i915/intel_pm.c
> @@ -3187,10 +3187,14 @@ static void skl_compute_wm_pipe_parameters(struct 
> drm_crtc *crtc,
>  
>       p->active = intel_crtc->active;
>       if (p->active) {
> +             const struct intel_plane_state *plane_state;
> +             int src_w, src_h;
> +
>               p->pipe_htotal = 
> intel_crtc->config->base.adjusted_mode.crtc_htotal;
>               p->pixel_rate = skl_pipe_pixel_rate(intel_crtc->config);
>  
>               fb = crtc->primary->state->fb;
> +             plane_state = to_intel_plane_state(crtc->primary->state);
>               /* For planar: Bpp is for uv plane, y_Bpp is for y plane */
>               if (fb) {
>                       p->plane[0].enabled = true;
> @@ -3205,8 +3209,17 @@ static void skl_compute_wm_pipe_parameters(struct 
> drm_crtc *crtc,
>                       p->plane[0].y_bytes_per_pixel = 0;
>                       p->plane[0].tiling = DRM_FORMAT_MOD_NONE;
>               }
> -             p->plane[0].horiz_pixels = intel_crtc->config->pipe_src_w;
> -             p->plane[0].vert_pixels = intel_crtc->config->pipe_src_h;
> +
> +             src_w = drm_rect_width(&plane_state->src) >> 16;
> +             src_h = drm_rect_height(&plane_state->src) >> 16;
> +
> +             if (intel_rotation_90_or_270(crtc->primary->state->rotation)) {
> +                     p->plane[0].horiz_pixels = src_h;
> +                     p->plane[0].vert_pixels = src_w;
> +             } else {
> +                     p->plane[0].horiz_pixels = src_w;
> +                     p->plane[0].vert_pixels = src_h;
> +             }
>               p->plane[0].rotation = crtc->primary->state->rotation;
>  
>               fb = crtc->cursor->state->fb;
> @@ -3740,8 +3753,15 @@ skl_update_sprite_wm(struct drm_plane *plane, struct 
> drm_crtc *crtc,
>  
>       intel_plane->wm.enabled = enabled;
>       intel_plane->wm.scaled = scaled;
> -     intel_plane->wm.horiz_pixels = sprite_width;
> -     intel_plane->wm.vert_pixels = sprite_height;
> +
> +     if (intel_rotation_90_or_270(plane->state->rotation)) {
> +             intel_plane->wm.horiz_pixels = sprite_height;
> +             intel_plane->wm.vert_pixels = sprite_width;
> +     } else {
> +             intel_plane->wm.horiz_pixels = sprite_width;
> +             intel_plane->wm.vert_pixels = sprite_height;
> +     }
> +
>       intel_plane->wm.tiling = DRM_FORMAT_MOD_NONE;
>  
>       /* For planar: Bpp is for UV plane, y_Bpp is for Y plane */
> -- 
> 1.7.9.5
> 
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/intel-gfx

-- 
Ville Syrjälä
Intel OTC
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