On Thu, Oct 22, 2015 at 03:35:00PM +0300, [email protected] wrote:
> From: Ville Syrjälä <[email protected]>
> 
> Include an early NEEDS_FORCEWAKE() check for vlv and chv.
> Hopefully that will avoid doing so many range checks in for many
> register accesses (at least for all display registers).
> 
> Note that vlv already had the check in the write path since it shares
> the gen6+ code for that.
> 
> Signed-off-by: Ville Syrjälä <[email protected]>

I double-checked that all ranges are below the NEEDS_FORCEWAKE limit.

Reviewed-by: Daniel Vetter <[email protected]>

> ---
>  drivers/gpu/drm/i915/intel_uncore.c | 11 ++++++++---
>  1 file changed, 8 insertions(+), 3 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/intel_uncore.c 
> b/drivers/gpu/drm/i915/intel_uncore.c
> index f38e88b..f0f97b2 100644
> --- a/drivers/gpu/drm/i915/intel_uncore.c
> +++ b/drivers/gpu/drm/i915/intel_uncore.c
> @@ -726,7 +726,9 @@ static u##x \
>  vlv_read##x(struct drm_i915_private *dev_priv, off_t reg, bool trace) { \
>       enum forcewake_domains fw_engine = 0; \
>       GEN6_READ_HEADER(x); \
> -     if (FORCEWAKE_VLV_RENDER_RANGE_OFFSET(reg)) \
> +     if (!NEEDS_FORCE_WAKE(reg)) \
> +             fw_engine = 0; \
> +     else if (FORCEWAKE_VLV_RENDER_RANGE_OFFSET(reg)) \
>               fw_engine = FORCEWAKE_RENDER; \
>       else if (FORCEWAKE_VLV_MEDIA_RANGE_OFFSET(reg)) \
>               fw_engine = FORCEWAKE_MEDIA; \
> @@ -741,7 +743,9 @@ static u##x \
>  chv_read##x(struct drm_i915_private *dev_priv, off_t reg, bool trace) { \
>       enum forcewake_domains fw_engine = 0; \
>       GEN6_READ_HEADER(x); \
> -     if (FORCEWAKE_CHV_RENDER_RANGE_OFFSET(reg)) \
> +     if (!NEEDS_FORCE_WAKE(reg)) \
> +             fw_engine = 0; \
> +     else if (FORCEWAKE_CHV_RENDER_RANGE_OFFSET(reg)) \
>               fw_engine = FORCEWAKE_RENDER; \
>       else if (FORCEWAKE_CHV_MEDIA_RANGE_OFFSET(reg)) \
>               fw_engine = FORCEWAKE_MEDIA; \
> @@ -935,7 +939,8 @@ static void \
>  chv_write##x(struct drm_i915_private *dev_priv, off_t reg, u##x val, bool 
> trace) { \
>       enum forcewake_domains fw_engine = 0; \
>       GEN6_WRITE_HEADER; \
> -     if (is_gen8_shadowed(dev_priv, reg)) \
> +     if (!NEEDS_FORCE_WAKE(reg) || \
> +         is_gen8_shadowed(dev_priv, reg)) \
>               fw_engine = 0; \
>       else if (FORCEWAKE_CHV_RENDER_RANGE_OFFSET(reg)) \
>               fw_engine = FORCEWAKE_RENDER; \
> -- 
> 2.4.9
> 
> _______________________________________________
> Intel-gfx mailing list
> [email protected]
> http://lists.freedesktop.org/mailman/listinfo/intel-gfx

-- 
Daniel Vetter
Software Engineer, Intel Corporation
http://blog.ffwll.ch
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