On 17/11/15 14:52, Jani Nikula wrote:
On Tue, 17 Nov 2015, Daniel Vetter <[email protected]> wrote:
On Fri, Oct 23, 2015 at 09:53:35AM -0700, Matt Roper wrote:
On Mon, Sep 21, 2015 at 11:41:18PM +0530, Kumar, Mahesh wrote:
In case of Y-Tiling, "plane_blocks_per_line" calculation is different
than X/None-Tiling case.
This patch corrects this calculation according to Bspec.
plane blocks per line = Plane memory format is Y tile ?
ceiling[4 * plane bytes per line / 512]/4 :
ceiling[plane bytes per line / 512]
As per BSpec Don't increment selected "result_blocks" & "result_lines"
in case of BROXTON.
Signed-off-by: Kumar, Mahesh <[email protected]>
Confirmed both changes against bspec. Note that your first hunk here is
technically a fix for both SKL and BXT, only the second one is a
BXT-specific fix.
Reviewed-by: Matt Roper <[email protected]>
This needs to be rebased (p_params is gone).
And we already have this for skl
commit 0fda65680e92545caea5be7805a7f0a617fb6c20
Author: Tvrtko Ursulin <[email protected]>
Date: Fri Feb 27 15:12:35 2015 +0000
drm/i915/skl: Update watermarks for Y tiling
Mahesh, please check if you still need to make changes for BXT.
Mahesh's patch seems to be on top of that one, so either a new doc
change or something I've missed back then.
Regards,
Tvrtko
_______________________________________________
Intel-gfx mailing list
[email protected]
http://lists.freedesktop.org/mailman/listinfo/intel-gfx
