On Thu, Dec 10, 2015 at 02:37:01PM +0100, Daniel Vetter wrote:
> On Tue, Dec 08, 2015 at 07:59:44PM +0200, [email protected] wrote:
> > From: Ville Syrjälä <[email protected]>
> >
> > Move the ddi buffer translation programming to occur from the encoder
> > .pre_enable() hook, for just the ddi port we are enabling. Previously
> > we used to reprogram the translations for all ddi ports during
> > init and during power well enabling.
> >
> > Signed-off-by: Ville Syrjälä <[email protected]>
> > ---
> > drivers/gpu/drm/i915/i915_drv.c | 1 -
> > drivers/gpu/drm/i915/intel_ddi.c | 99
> > ++++++++++-----------------------
> > drivers/gpu/drm/i915/intel_display.c | 3 -
> > drivers/gpu/drm/i915/intel_dp_mst.c | 2 +
> > drivers/gpu/drm/i915/intel_drv.h | 2 +-
> > drivers/gpu/drm/i915/intel_runtime_pm.c | 12 ----
> > 6 files changed, 31 insertions(+), 88 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/i915/i915_drv.c
> > b/drivers/gpu/drm/i915/i915_drv.c
> > index e6935f1cb689..4d8feff411bb 100644
> > --- a/drivers/gpu/drm/i915/i915_drv.c
> > +++ b/drivers/gpu/drm/i915/i915_drv.c
> > @@ -1062,7 +1062,6 @@ static int bxt_resume_prepare(struct drm_i915_private
> > *dev_priv)
> > */
> > broxton_init_cdclk(dev);
> > broxton_ddi_phy_init(dev);
> > - intel_prepare_ddi(dev);
> >
> > return 0;
> > }
> > diff --git a/drivers/gpu/drm/i915/intel_ddi.c
> > b/drivers/gpu/drm/i915/intel_ddi.c
> > index 152c813cc43e..074121efb265 100644
> > --- a/drivers/gpu/drm/i915/intel_ddi.c
> > +++ b/drivers/gpu/drm/i915/intel_ddi.c
> > @@ -342,12 +342,6 @@ enum port intel_ddi_get_encoder_port(struct
> > intel_encoder *intel_encoder)
> > return port;
> > }
> >
> > -static bool
> > -intel_dig_port_supports_hdmi(const struct intel_digital_port
> > *intel_dig_port)
> > -{
> > - return i915_mmio_reg_valid(intel_dig_port->hdmi.hdmi_reg);
> > -}
> > -
> > static const struct ddi_buf_trans *
> > skl_get_buf_trans_dp(struct drm_i915_private *dev_priv, int *n_entries)
> > {
> > @@ -409,28 +403,34 @@ skl_get_buf_trans_hdmi(struct drm_i915_private
> > *dev_priv, int *n_entries)
> > * in either FDI or DP modes only, as HDMI connections will work with both
> > * of those
> > */
> > -static void intel_prepare_ddi_buffers(struct drm_i915_private *dev_priv,
> > - enum port port, bool supports_hdmi)
> > +void intel_prepare_ddi_buffers(struct intel_encoder *encoder)
>
> s/buffers/buffer/ since it's not just for one encoder? Or do we have a
> pile of buffers per encoder? Seems a bit confusing to me, but really just
> a bikeshed and was there before.
Bspec seems to refer to it as a singular "DDI buffer" so yeah dropping
the 's' would seem to match. I suppose in reality there's a buffer on
each signal, but I guess it's common practice to refer to the whole
thing as a single buffer.
>
> > {
> > + struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
> > u32 iboost_bit = 0;
> > int i, n_hdmi_entries, n_dp_entries, n_edp_entries, hdmi_default_entry,
> > size;
> > - int hdmi_level = dev_priv->vbt.ddi_port_info[port].hdmi_level_shift;
> > + int hdmi_level;
> > + enum port port;
> > const struct ddi_buf_trans *ddi_translations_fdi;
> > const struct ddi_buf_trans *ddi_translations_dp;
> > const struct ddi_buf_trans *ddi_translations_edp;
> > const struct ddi_buf_trans *ddi_translations_hdmi;
> > const struct ddi_buf_trans *ddi_translations;
> >
> > + port = intel_ddi_get_encoder_port(encoder);
> > + hdmi_level = dev_priv->vbt.ddi_port_info[port].hdmi_level_shift;
> > +
> > if (IS_BROXTON(dev_priv)) {
> > - if (!supports_hdmi)
> > + if (encoder->type != INTEL_OUTPUT_HDMI)
> > return;
> >
> > /* Vswing programming for HDMI */
> > bxt_ddi_vswing_sequence(dev_priv, hdmi_level, port,
> > INTEL_OUTPUT_HDMI);
> > return;
> > - } else if (IS_SKYLAKE(dev_priv) || IS_KABYLAKE(dev_priv)) {
> > + }
> > +
> > + if (IS_SKYLAKE(dev_priv) || IS_KABYLAKE(dev_priv)) {
> > ddi_translations_fdi = NULL;
> > ddi_translations_dp =
> > skl_get_buf_trans_dp(dev_priv, &n_dp_entries);
> > @@ -483,30 +483,18 @@ static void intel_prepare_ddi_buffers(struct
> > drm_i915_private *dev_priv,
> > hdmi_default_entry = 7;
> > }
> >
> > - switch (port) {
> > - case PORT_A:
> > + switch (encoder->type) {
> > + case INTEL_OUTPUT_EDP:
> > ddi_translations = ddi_translations_edp;
> > size = n_edp_entries;
> > break;
> > - case PORT_B:
> > - case PORT_C:
> > + case INTEL_OUTPUT_DISPLAYPORT:
> > + case INTEL_OUTPUT_HDMI:
> > ddi_translations = ddi_translations_dp;
> > size = n_dp_entries;
> > break;
> > - case PORT_D:
> > - if (intel_dp_is_edp(dev_priv->dev, PORT_D)) {
> > - ddi_translations = ddi_translations_edp;
> > - size = n_edp_entries;
> > - } else {
> > - ddi_translations = ddi_translations_dp;
> > - size = n_dp_entries;
> > - }
> > - break;
> > - case PORT_E:
> > - if (ddi_translations_fdi)
> > - ddi_translations = ddi_translations_fdi;
> > - else
> > - ddi_translations = ddi_translations_dp;
> > + case INTEL_OUTPUT_ANALOG:
> > + ddi_translations = ddi_translations_fdi;
> > size = n_dp_entries;
> > break;
> > default:
> > @@ -520,7 +508,7 @@ static void intel_prepare_ddi_buffers(struct
> > drm_i915_private *dev_priv,
> > ddi_translations[i].trans2);
> > }
> >
> > - if (!supports_hdmi)
> > + if (encoder->type != INTEL_OUTPUT_HDMI)
> > return;
> >
> > /* Choose a good default if VBT is badly populated */
> > @@ -535,37 +523,6 @@ static void intel_prepare_ddi_buffers(struct
> > drm_i915_private *dev_priv,
> > ddi_translations_hdmi[hdmi_level].trans2);
> > }
> >
> > -/* Program DDI buffers translations for DP. By default, program ports A-D
> > in DP
> > - * mode and port E for FDI.
> > - */
> > -void intel_prepare_ddi(struct drm_device *dev)
> > -{
> > - struct intel_encoder *intel_encoder;
> > - bool visited[I915_MAX_PORTS] = { 0, };
> > -
> > - if (!HAS_DDI(dev))
> > - return;
> > -
> > - for_each_intel_encoder(dev, intel_encoder) {
> > - struct intel_digital_port *intel_dig_port;
> > - enum port port;
> > - bool supports_hdmi;
> > -
> > - if (intel_encoder->type == INTEL_OUTPUT_DSI)
> > - continue;
> > -
> > - ddi_get_encoder_port(intel_encoder, &intel_dig_port, &port);
> > - if (visited[port])
> > - continue;
> > -
> > - supports_hdmi = intel_dig_port &&
> > - intel_dig_port_supports_hdmi(intel_dig_port);
> > -
> > - intel_prepare_ddi_buffers(to_i915(dev), port, supports_hdmi);
> > - visited[port] = true;
> > - }
> > -}
> > -
> > static void intel_wait_ddi_buf_idle(struct drm_i915_private *dev_priv,
> > enum port port)
> > {
> > @@ -594,8 +551,14 @@ void hsw_fdi_link_train(struct drm_crtc *crtc)
> > struct drm_device *dev = crtc->dev;
> > struct drm_i915_private *dev_priv = dev->dev_private;
> > struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
> > + struct intel_encoder *encoder;
> > u32 temp, i, rx_ctl_val;
> >
> > + for_each_encoder_on_crtc(dev, crtc, encoder) {
> > + WARN_ON(encoder->type != INTEL_OUTPUT_ANALOG);
> > + intel_prepare_ddi_buffers(encoder);
> > + }
>
> I still maintain that on hsw the entire fdi stuff really should all be
> part of the encoder, since it's all behind the pipe/port crossbar. Would
> avoid this little annoyance here.
Yeah, it's a bit unsightly. Actually I forgot to put this here
originally, and then I was wondering why FDI was acting up. I then put
it into the crt .pre_enable() hook but it looked too lonely there,
so in the end I figured it's better to have it next to the FDI setup
where it's actually needed, leading to the encoder loop.
>
> > +
> > /* Set the FDI_RX_MISC pwrdn lanes and the 2 workarounds listed at the
> > * mode set "sequence for CRT port" document:
> > * - TP1 to TP2 time with the default value
> > @@ -2321,12 +2284,12 @@ void intel_ddi_clk_select(struct intel_encoder
> > *encoder,
> > static void intel_ddi_pre_enable(struct intel_encoder *intel_encoder)
> > {
> > struct drm_encoder *encoder = &intel_encoder->base;
> > - struct drm_device *dev = encoder->dev;
> > - struct drm_i915_private *dev_priv = dev->dev_private;
> > + struct drm_i915_private *dev_priv = to_i915(encoder->dev);
> > struct intel_crtc *crtc = to_intel_crtc(encoder->crtc);
> > enum port port = intel_ddi_get_encoder_port(intel_encoder);
> > int type = intel_encoder->type;
> > - int hdmi_level;
> > +
> > + intel_prepare_ddi_buffers(intel_encoder);
> >
> > if (type == INTEL_OUTPUT_EDP) {
> > struct intel_dp *intel_dp = enc_to_intel_dp(encoder);
> > @@ -2344,17 +2307,11 @@ static void intel_ddi_pre_enable(struct
> > intel_encoder *intel_encoder)
> >
> > intel_dp_sink_dpms(intel_dp, DRM_MODE_DPMS_ON);
> > intel_dp_start_link_train(intel_dp);
> > - if (port != PORT_A || INTEL_INFO(dev)->gen >= 9)
> > + if (port != PORT_A || INTEL_INFO(dev_priv)->gen >= 9)
> > intel_dp_stop_link_train(intel_dp);
> > } else if (type == INTEL_OUTPUT_HDMI) {
> > struct intel_hdmi *intel_hdmi = enc_to_intel_hdmi(encoder);
> >
> > - if (IS_BROXTON(dev)) {
> > - hdmi_level = dev_priv->vbt.
> > - ddi_port_info[port].hdmi_level_shift;
> > - bxt_ddi_vswing_sequence(dev_priv, hdmi_level, port,
> > - INTEL_OUTPUT_HDMI);
> > - }
> > intel_hdmi->set_infoframes(encoder,
> > crtc->config->has_hdmi_sink,
> > &crtc->config->base.adjusted_mode);
> > diff --git a/drivers/gpu/drm/i915/intel_display.c
> > b/drivers/gpu/drm/i915/intel_display.c
> > index f1a5404728df..bc7aaa3c431e 100644
> > --- a/drivers/gpu/drm/i915/intel_display.c
> > +++ b/drivers/gpu/drm/i915/intel_display.c
> > @@ -9649,8 +9649,6 @@ void hsw_disable_pc8(struct drm_i915_private
> > *dev_priv)
> > val |= PCH_LP_PARTITION_LEVEL_DISABLE;
> > I915_WRITE(SOUTH_DSPCLK_GATE_D, val);
> > }
> > -
> > - intel_prepare_ddi(dev);
> > }
> >
> > static void broxton_modeset_commit_cdclk(struct drm_atomic_state
> > *old_state)
> > @@ -15172,7 +15170,6 @@ static void i915_disable_vga(struct drm_device *dev)
> > void intel_modeset_init_hw(struct drm_device *dev)
> > {
> > intel_update_cdclk(dev);
> > - intel_prepare_ddi(dev);
>
> This patch is worth it just for this hunk here and the one below in the
> skl dmc code.
>
> Reviewed-by: Daniel Vetter <[email protected]>
>
> > intel_init_clock_gating(dev);
> > intel_enable_gt_powersave(dev);
> > }
> > diff --git a/drivers/gpu/drm/i915/intel_dp_mst.c
> > b/drivers/gpu/drm/i915/intel_dp_mst.c
> > index abfc171888b8..73ac68e21b7e 100644
> > --- a/drivers/gpu/drm/i915/intel_dp_mst.c
> > +++ b/drivers/gpu/drm/i915/intel_dp_mst.c
> > @@ -173,6 +173,8 @@ static void intel_mst_pre_enable_dp(struct
> > intel_encoder *encoder)
> > intel_mst->port = found->port;
> >
> > if (intel_dp->active_mst_links == 0) {
> > + intel_prepare_ddi_buffers(&intel_dig_port->base);
> > +
> > intel_ddi_clk_select(&intel_dig_port->base, intel_crtc->config);
> >
> > intel_dp_set_link_params(intel_dp, intel_crtc->config);
> > diff --git a/drivers/gpu/drm/i915/intel_drv.h
> > b/drivers/gpu/drm/i915/intel_drv.h
> > index 43d451c7c366..a8a84b8c2bac 100644
> > --- a/drivers/gpu/drm/i915/intel_drv.h
> > +++ b/drivers/gpu/drm/i915/intel_drv.h
> > @@ -996,7 +996,7 @@ void intel_crt_init(struct drm_device *dev);
> > /* intel_ddi.c */
> > void intel_ddi_clk_select(struct intel_encoder *encoder,
> > const struct intel_crtc_state *pipe_config);
> > -void intel_prepare_ddi(struct drm_device *dev);
> > +void intel_prepare_ddi_buffers(struct intel_encoder *encoder);
> > void hsw_fdi_link_train(struct drm_crtc *crtc);
> > void intel_ddi_init(struct drm_device *dev, enum port port);
> > enum port intel_ddi_get_encoder_port(struct intel_encoder *intel_encoder);
> > diff --git a/drivers/gpu/drm/i915/intel_runtime_pm.c
> > b/drivers/gpu/drm/i915/intel_runtime_pm.c
> > index 2c2151f1c47e..60a592d20402 100644
> > --- a/drivers/gpu/drm/i915/intel_runtime_pm.c
> > +++ b/drivers/gpu/drm/i915/intel_runtime_pm.c
> > @@ -625,7 +625,6 @@ void skl_disable_dc6(struct drm_i915_private *dev_priv)
> > static void skl_set_power_well(struct drm_i915_private *dev_priv,
> > struct i915_power_well *power_well, bool enable)
> > {
> > - struct drm_device *dev = dev_priv->dev;
> > uint32_t tmp, fuse_status;
> > uint32_t req_mask, state_mask;
> > bool is_enabled, enable_requested, check_fuse_status = false;
> > @@ -669,17 +668,6 @@ static void skl_set_power_well(struct drm_i915_private
> > *dev_priv,
> > !I915_READ(HSW_PWR_WELL_BIOS),
> > "Invalid for power well status to be enabled,
> > unless done by the BIOS, \
> > when request is to disable!\n");
> > - if (power_well->data == SKL_DISP_PW_2) {
> > - /*
> > - * DDI buffer programming unnecessary during
> > - * driver-load/resume as it's already done
> > - * during modeset initialization then. It's
> > - * also invalid here as encoder list is still
> > - * uninitialized.
> > - */
> > - if (!dev_priv->power_domains.initializing)
> > - intel_prepare_ddi(dev);
> > - }
> > I915_WRITE(HSW_PWR_WELL_DRIVER, tmp | req_mask);
> > }
> >
> > --
> > 2.4.10
> >
> > _______________________________________________
> > Intel-gfx mailing list
> > [email protected]
> > http://lists.freedesktop.org/mailman/listinfo/intel-gfx
>
> --
> Daniel Vetter
> Software Engineer, Intel Corporation
> http://blog.ffwll.ch
--
Ville Syrjälä
Intel OTC
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