Getting subslice status does access hw so it needs a pm ref.
Signed-off-by: Mika Kuoppala <[email protected]>
---
drivers/gpu/drm/i915/i915_debugfs.c | 5 +++++
1 file changed, 5 insertions(+)
diff --git a/drivers/gpu/drm/i915/i915_debugfs.c
b/drivers/gpu/drm/i915/i915_debugfs.c
index 5770307..c9d11ba 100644
--- a/drivers/gpu/drm/i915/i915_debugfs.c
+++ b/drivers/gpu/drm/i915/i915_debugfs.c
@@ -5206,6 +5206,7 @@ static int i915_sseu_status(struct seq_file *m, void
*unused)
{
struct drm_info_node *node = (struct drm_info_node *) m->private;
struct drm_device *dev = node->minor->dev;
+ struct drm_i915_private *dev_priv = dev->dev_private;
struct sseu_dev_status stat;
if (INTEL_INFO(dev)->gen < 8)
@@ -5231,6 +5232,8 @@ static int i915_sseu_status(struct seq_file *m, void
*unused)
seq_puts(m, "SSEU Device Status\n");
memset(&stat, 0, sizeof(stat));
+
+ intel_runtime_pm_get(dev_priv);
if (IS_CHERRYVIEW(dev)) {
cherryview_sseu_device_status(dev, &stat);
} else if (IS_BROADWELL(dev)) {
@@ -5238,6 +5241,8 @@ static int i915_sseu_status(struct seq_file *m, void
*unused)
} else if (INTEL_INFO(dev)->gen >= 9) {
gen9_sseu_device_status(dev, &stat);
}
+ intel_runtime_pm_put(dev_priv);
+
seq_printf(m, " Enabled Slice Total: %u\n",
stat.slice_total);
seq_printf(m, " Enabled Subslice Total: %u\n",
--
2.5.0
_______________________________________________
Intel-gfx mailing list
[email protected]
http://lists.freedesktop.org/mailman/listinfo/intel-gfx
