On Wed, 13 Jan 2016, Ville Syrjälä <[email protected]> wrote:
> On Wed, Jan 13, 2016 at 04:35:20PM +0200, Jani Nikula wrote:
>> Per DP spec, the source device should fall back to 18 bpp, VESA range
>> RGB when the sink capability is unknown. Fix the color depth
>> clamping. 18 bpp color depth should ensure full color range in automatic
>> mode.
>>
>> The clamping has been HDMI specific since its introduction in
>>
>> commit 996a2239f93b03c5972923f04b097f65565c5bed
>> Author: Daniel Vetter <[email protected]>
>> Date: Fri Apr 19 11:24:34 2013 +0200
>>
>> drm/i915: Disable high-bpc on pre-1.4 EDID screens
>>
>> Cc: [email protected]
>> Reported-by: Dihan Wickremasuriya <[email protected]>
>> Bugzilla: https://bugzilla.kernel.org/show_bug.cgi?id=105331
>> Signed-off-by: Jani Nikula <[email protected]>
>
> Makes sense to me as far as the spec is concerned.
> Reviewed-by: Ville Syrjälä <[email protected]>
Also got Tested-by in the bug. Pushed to drm-intel-next-queued, thanks
for the review.
BR,
Jani.
>
>> ---
>> drivers/gpu/drm/i915/intel_display.c | 20 +++++++++++++++-----
>> 1 file changed, 15 insertions(+), 5 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/i915/intel_display.c
>> b/drivers/gpu/drm/i915/intel_display.c
>> index 07ca19b0ec17..6eaecd9385ab 100644
>> --- a/drivers/gpu/drm/i915/intel_display.c
>> +++ b/drivers/gpu/drm/i915/intel_display.c
>> @@ -12171,11 +12171,21 @@ connected_sink_compute_bpp(struct intel_connector
>> *connector,
>> pipe_config->pipe_bpp = connector->base.display_info.bpc*3;
>> }
>>
>> - /* Clamp bpp to 8 on screens without EDID 1.4 */
>> - if (connector->base.display_info.bpc == 0 && bpp > 24) {
>> - DRM_DEBUG_KMS("clamping display bpp (was %d) to default limit
>> of 24\n",
>> - bpp);
>> - pipe_config->pipe_bpp = 24;
>> + /* Clamp bpp to default limit on screens without EDID 1.4 */
>> + if (connector->base.display_info.bpc == 0) {
>> + int type = connector->base.connector_type;
>> + int clamp_bpp = 24;
>> +
>> + /* Fall back to 18 bpp when DP sink capability is unknown. */
>> + if (type == DRM_MODE_CONNECTOR_DisplayPort ||
>> + type == DRM_MODE_CONNECTOR_eDP)
>> + clamp_bpp = 18;
>> +
>> + if (bpp > clamp_bpp) {
>> + DRM_DEBUG_KMS("clamping display bpp (was %d) to default
>> limit of %d\n",
>> + bpp, clamp_bpp);
>> + pipe_config->pipe_bpp = clamp_bpp;
>> + }
>> }
>> }
>>
>> --
>> 2.1.4
--
Jani Nikula, Intel Open Source Technology Center
_______________________________________________
Intel-gfx mailing list
[email protected]
http://lists.freedesktop.org/mailman/listinfo/intel-gfx
