On Wed, 2015-12-09 at 17:29 +0530, Deepak M wrote: > For broxton dual link Z-inversion overlap field is present > in MIPI_CTRL register unlike the other platforms, hence > setting the same in this patch. > Tested-by: Mika Kahola <[email protected]> > Signed-off-by: Deepak M <[email protected]> > --- > drivers/gpu/drm/i915/i915_reg.h | 4 ++++ > drivers/gpu/drm/i915/intel_dsi.c | 16 +++++++++++++--- > 2 files changed, 17 insertions(+), 3 deletions(-) > > diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h > index 009f474..fa72be9 100644 > --- a/drivers/gpu/drm/i915/i915_reg.h > +++ b/drivers/gpu/drm/i915/i915_reg.h > @@ -8107,6 +8107,10 @@ enum skl_disp_power_wells { > #define BXT_PIPE_SELECT_B (1 << 7) > #define BXT_PIPE_SELECT_A (0 << 7) > > +/* BXT has dual link Z inversion overlap field */ > +#define BXT_PIXEL_OVERLAP_CNT_MASK (0xf << 10) > +#define BXT_PIXEL_OVERLAP_CNT_SHIFT 10 > + > #define _MIPIA_DATA_ADDRESS (dev_priv->mipi_mmio_base + 0xb108) > #define _MIPIC_DATA_ADDRESS (dev_priv->mipi_mmio_base + 0xb908) > #define MIPI_DATA_ADDRESS(port) _MIPI_PORT(port, > _MIPIA_DATA_ADDRESS, \ > diff --git a/drivers/gpu/drm/i915/intel_dsi.c > b/drivers/gpu/drm/i915/intel_dsi.c > index eff982b..f5df49b 100644 > --- a/drivers/gpu/drm/i915/intel_dsi.c > +++ b/drivers/gpu/drm/i915/intel_dsi.c > @@ -392,11 +392,21 @@ static void intel_dsi_port_enable(struct intel_encoder > *encoder) > u32 port_ctrl; > > if (intel_dsi->dual_link == DSI_DUAL_LINK_FRONT_BACK) { > - temp = I915_READ(VLV_CHICKEN_3); > - temp &= ~PIXEL_OVERLAP_CNT_MASK | > + if (IS_BROXTON(dev)) { > + for_each_dsi_port(port, intel_dsi->ports) { > + temp = I915_READ(MIPI_CTRL(port)); > + temp &= ~BXT_PIXEL_OVERLAP_CNT_MASK | > intel_dsi->pixel_overlap << > + BXT_PIXEL_OVERLAP_CNT_SHIFT; > + I915_WRITE(MIPI_CTRL(port), temp); > + } > + } else { > + temp = I915_READ(VLV_CHICKEN_3); > + temp &= ~PIXEL_OVERLAP_CNT_MASK | > + intel_dsi->pixel_overlap << > PIXEL_OVERLAP_CNT_SHIFT; > - I915_WRITE(VLV_CHICKEN_3, temp); > + I915_WRITE(VLV_CHICKEN_3, temp); > + } > } > > for_each_dsi_port(port, intel_dsi->ports) {
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