Arun Siluvery <[email protected]> writes:

> From Gen8 onwards we apply ctx workarounds using special batch buffers that
> execute during save/restore, good to have them in error state.
>
> v2: use wa_ctx->size and print only size values (Mika)
>
> Signed-off-by: Arun Siluvery <[email protected]>

Reviewed-by: Mika Kuoppala <[email protected]>

> ---
>  drivers/gpu/drm/i915/i915_drv.h       |  2 +-
>  drivers/gpu/drm/i915/i915_gpu_error.c | 28 ++++++++++++++++++++++++++++
>  2 files changed, 29 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
> index f7808d3..7ad0b47 100644
> --- a/drivers/gpu/drm/i915/i915_drv.h
> +++ b/drivers/gpu/drm/i915/i915_drv.h
> @@ -568,7 +568,7 @@ struct drm_i915_error_state {
>                       bool is_ppgtt;
>                       int page_count;
>                       u32 *pages[0];
> -             } *req_ringbuffer, *hw_ringbuffer, *batchbuffer, 
> *wa_batchbuffer, *ctx, *hws_page;
> +             } *req_ringbuffer, *hw_ringbuffer, *batchbuffer, 
> *wa_batchbuffer, *ctx, *hws_page, *wa_ctx;
>  
>               struct drm_i915_error_request {
>                       u64 ctx_desc;
> diff --git a/drivers/gpu/drm/i915/i915_gpu_error.c 
> b/drivers/gpu/drm/i915/i915_gpu_error.c
> index f426538..b62edbb 100644
> --- a/drivers/gpu/drm/i915/i915_gpu_error.c
> +++ b/drivers/gpu/drm/i915/i915_gpu_error.c
> @@ -659,6 +659,27 @@ int i915_error_state_to_str(struct 
> drm_i915_error_state_buf *m,
>                       }
>               }
>  
> +             if ((obj = error->ring[i].wa_ctx)) {
> +                     u64 wa_ctx_offset = obj->gtt_offset;
> +                     u32 *wa_ctx_page = &obj->pages[0][0];
> +                     struct intel_engine_cs *ring = &dev_priv->ring[RCS];
> +                     u32 wa_ctx_size = (ring->wa_ctx.indirect_ctx.size +
> +                                        ring->wa_ctx.per_ctx.size);
> +
> +                     err_printf(m, "%s --- WA Ctx batch buffer = 0x%08llx\n",
> +                                dev_priv->ring[i].name, wa_ctx_offset);
> +                     offset = 0;
> +                     for (elt = 0; elt < wa_ctx_size; elt += 4) {
> +                             err_printf(m, "[%04x] %08x %08x %08x %08x\n",
> +                                        offset,
> +                                        wa_ctx_page[elt],
> +                                        wa_ctx_page[elt+1],
> +                                        wa_ctx_page[elt+2],
> +                                        wa_ctx_page[elt+3]);
> +                             offset += 16;
> +                     }
> +             }
> +
>               if ((obj = error->ring[i].ctx)) {
>                       err_printf(m, "%s --- HW Context = 0x%08x\n",
>                                  dev_priv->ring[i].name,
> @@ -752,6 +773,8 @@ static void i915_error_state_free(struct kref *error_ref)
>               i915_error_object_free(error->ring[i].hws_page);
>               i915_error_object_free(error->ring[i].ctx);
>               kfree(error->ring[i].requests);
> +             if (i == RCS)
> +                     i915_error_object_free(error->ring[i].wa_ctx);
>       }
>  
>       i915_error_object_free(error->semaphore_obj);
> @@ -1267,6 +1290,11 @@ static void i915_gem_record_rings(struct drm_device 
> *dev,
>               error->ring[i].hws_page =
>                       i915_error_ggtt_object_create(dev_priv, 
> ring->status_page.obj);
>  
> +             if (INTEL_INFO(dev)->gen >= 8 && ring->id == RCS) {
> +                     error->ring[i].wa_ctx =
> +                             i915_error_ggtt_object_create(dev_priv, 
> ring->wa_ctx.obj);
> +             }
> +
>               i915_gem_record_active_context(ring, error, &error->ring[i]);
>  
>               count = 0;
> -- 
> 1.9.1
>
> _______________________________________________
> Intel-gfx mailing list
> [email protected]
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
_______________________________________________
Intel-gfx mailing list
[email protected]
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

Reply via email to