On Mon, 2016-02-29 at 13:52 +0100, Maarten Lankhorst wrote: > Signed-off-by: Maarten Lankhorst <[email protected]> > --- > drivers/gpu/drm/i915/intel_display.c | 10 +++------- > 1 file changed, 3 insertions(+), 7 deletions(-) > > diff --git a/drivers/gpu/drm/i915/intel_display.c > b/drivers/gpu/drm/i915/intel_display.c > index 6e3b8a1f7dd3..6f2dd3192bac 100644 > --- a/drivers/gpu/drm/i915/intel_display.c > +++ b/drivers/gpu/drm/i915/intel_display.c > @@ -1912,8 +1912,6 @@ static void intel_enable_shared_dpll(struct intel_crtc > *crtc) > } > WARN_ON(pll->on); > > - intel_display_power_get(dev_priv, POWER_DOMAIN_PLLS); > - > DRM_DEBUG_KMS("enabling %s\n", pll->name); > pll->enable(dev_priv, pll); > pll->on = true; > @@ -1952,8 +1950,6 @@ static void intel_disable_shared_dpll(struct intel_crtc > *crtc) > DRM_DEBUG_KMS("disabling %s\n", pll->name); > pll->disable(dev_priv, pll); > pll->on = false; > - > - intel_display_power_put(dev_priv, POWER_DOMAIN_PLLS); > } > > static void ironlake_enable_pch_transcoder(struct drm_i915_private *dev_priv, > @@ -5347,6 +5343,9 @@ static unsigned long get_crtc_power_domains(struct > drm_crtc *crtc, > mask |= BIT(intel_display_port_power_domain(intel_encoder)); > } > > + if (crtc_state->shared_dpll != DPLL_ID_PRIVATE) > + mask |= BIT(POWER_DOMAIN_PLLS); > + > return mask; > } > > @@ -15775,9 +15774,6 @@ static void intel_modeset_readout_hw_state(struct > drm_device *dev) > > DRM_DEBUG_KMS("%s hw state readout: crtc_mask 0x%08x, on > %i\n", > pll->name, pll->config.crtc_mask, pll->on); > - > - if (pll->config.crtc_mask) > - intel_display_power_get(dev_priv, POWER_DOMAIN_PLLS); > } > > for_each_intel_encoder(dev, encoder) {
This is a nice little clean up. I'm afraid I might have to undo it so that a pll can be enabled without a crtc, but for the time being: Reviewed-by: Ander Conselvan de Oliveira <[email protected]> _______________________________________________ Intel-gfx mailing list [email protected] https://lists.freedesktop.org/mailman/listinfo/intel-gfx
