From: David Henningsson <david.hennings...@canonical.com>
I think this change was given to us, and they claimed it fixed an issue
on some monitor brand. I'm not sure what this patch actually does.
Signed-off-by: David Henningsson <david.hennings...@canonical.com>
Signed-off-by: Pierre-Louis Bossart <pierre-louis.boss...@linux.intel.com>
---
sound/hdmi_audio/intel_mid_hdmi_audio.c | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/sound/hdmi_audio/intel_mid_hdmi_audio.c
b/sound/hdmi_audio/intel_mid_hdmi_audio.c
index 611c51c..e696c80 100644
--- a/sound/hdmi_audio/intel_mid_hdmi_audio.c
+++ b/sound/hdmi_audio/intel_mid_hdmi_audio.c
@@ -386,6 +386,7 @@ static void snd_intelhad_reset_audio_v2(u8 reset)
static int had_prog_status_reg(struct snd_pcm_substream *substream,
struct snd_intelhad *intelhaddata)
{
+ union aud_cfg cfg_val = {.cfg_regval = 0};
union aud_ch_status_0 ch_stat0 = {.status_0_regval = 0};
union aud_ch_status_1 ch_stat1 = {.status_1_regval = 0};
int format;
@@ -396,6 +397,8 @@ static int had_prog_status_reg(struct snd_pcm_substream
*substream,
IEC958_AES0_NONAUDIO)>>1;
ch_stat0.status_0_regx.clk_acc = (intelhaddata->aes_bits &
IEC958_AES3_CON_CLOCK)>>4;
+ cfg_val.cfg_regx.val_bit = ch_stat0.status_0_regx.lpcm_id;
+
switch (substream->runtime->rate) {
case AUD_SAMPLE_RATE_32:
ch_stat0.status_0_regx.samp_freq = CH_STATUS_MAP_32KHZ;
@@ -474,7 +477,6 @@ int snd_intelhad_prog_audio_ctrl_v2(struct
snd_pcm_substream *substream,
else
cfg_val.cfg_regx_v2.layout = LAYOUT1;
- cfg_val.cfg_regx_v2.val_bit = 1;
had_write_register(AUD_CONFIG, cfg_val.cfg_regval);
return 0;
}
@@ -530,7 +532,6 @@ int snd_intelhad_prog_audio_ctrl_v1(struct
snd_pcm_substream *substream,
}
- cfg_val.cfg_regx.val_bit = 1;
had_write_register(AUD_CONFIG, cfg_val.cfg_regval);
return 0;
}
--
1.9.1
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