On ke, 2016-04-06 at 00:57 +0100, Chris Wilson wrote: > An oversight is that when we wrap the seqno, we need to reset the hw > semaphore counters to 0. We did this for gen6 and gen7 and forgot to do > so for the new implementation required for gen8 (legacy). > > Signed-off-by: Chris Wilson <[email protected]> > Cc: Mika Kuoppala <[email protected]> > Cc: Joonas Lahtinen <[email protected]> > --- > drivers/gpu/drm/i915/intel_ringbuffer.c | 8 ++++++++ > 1 file changed, 8 insertions(+) > > diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c > b/drivers/gpu/drm/i915/intel_ringbuffer.c > index fb304df8085d..c7023d6ca0b7 100644 > --- a/drivers/gpu/drm/i915/intel_ringbuffer.c > +++ b/drivers/gpu/drm/i915/intel_ringbuffer.c > @@ -2564,6 +2564,14 @@ void intel_ring_init_seqno(struct intel_engine_cs > *engine, u32 seqno) > } > memset(engine->semaphore.sync_seqno, 0, > sizeof(engine->semaphore.sync_seqno)); > + if (dev_priv->semaphore_obj) { > + struct drm_i915_gem_object *obj = dev_priv->semaphore_obj; > + struct page *page = i915_gem_object_get_dirty_page(obj, 0); > + uint64_t *semaphores = kmap(page); > + memset(semaphores + engine->id * I915_NUM_ENGINES, 0, > + sizeof(*semaphores) * I915_NUM_ENGINES);
There is i915_semaphore_seqno_size define which the GEN8_WAIT_OFFSET and GEN8_SIGNAL_OFFSET use. So rather use that to stay consistent. Other than that, Reviewed-by: Joonas Lahtinen <[email protected]> PS. The existing semaphore code could use some cleanup, adding to backlog. > + kunmap(page); > + } > > engine->set_seqno(engine, seqno); > -- Joonas Lahtinen Open Source Technology Center Intel Corporation _______________________________________________ Intel-gfx mailing list [email protected] https://lists.freedesktop.org/mailman/listinfo/intel-gfx
