Tom,

Might be worth taking the "Do Not Merge" message out.

Peter.

On Wed, 6 Apr 2016, [email protected] wrote:

From: Peter Antoine <[email protected]>

This patch resizes the GuC WOPCM to so that the GuC and the RC6 memory
spaces do not overlap.

DO NOT MERGE: This patch is expected as part of another
series and is included for convenience in testing this
series.

Issue: https://jira01.devtools.intel.com/browse/VIZ-6638
Signed-off-by: Peter Antoine <[email protected]>
Signed-off-by: Jeff McGee <[email protected]>
Acked-by: Tom O'Rourke <Tom.O'[email protected]>
---
drivers/gpu/drm/i915/i915_guc_reg.h     | 3 ++-
drivers/gpu/drm/i915/intel_guc_loader.c | 6 +++++-
2 files changed, 7 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_guc_reg.h 
b/drivers/gpu/drm/i915/i915_guc_reg.h
index 80786d9..0a86599 100644
--- a/drivers/gpu/drm/i915/i915_guc_reg.h
+++ b/drivers/gpu/drm/i915/i915_guc_reg.h
@@ -68,7 +68,8 @@
#define GUC_MAX_IDLE_COUNT              _MMIO(0xC3E4)

#define GUC_WOPCM_SIZE                  _MMIO(0xc050)
-#define   GUC_WOPCM_SIZE_VALUE           (0x80 << 12)    /* 512KB */
+#define   GUC_WOPCM_SIZE_VALUE         (0x80 << 12)      /* 512KB */
+#define   BXT_GUC_WOPCM_SIZE_VALUE     (0x70 << 12)      /* 448KB */

/* GuC addresses below GUC_WOPCM_TOP don't map through the GTT */
#define GUC_WOPCM_TOP                   (GUC_WOPCM_SIZE_VALUE)
diff --git a/drivers/gpu/drm/i915/intel_guc_loader.c 
b/drivers/gpu/drm/i915/intel_guc_loader.c
index a46dd93..a9429d9 100644
--- a/drivers/gpu/drm/i915/intel_guc_loader.c
+++ b/drivers/gpu/drm/i915/intel_guc_loader.c
@@ -343,7 +343,11 @@ static int guc_ucode_xfer(struct drm_i915_private 
*dev_priv)
        intel_uncore_forcewake_get(dev_priv, FORCEWAKE_ALL);

        /* init WOPCM */
-       I915_WRITE(GUC_WOPCM_SIZE, GUC_WOPCM_SIZE_VALUE);
+       if (IS_BROXTON(dev))
+               I915_WRITE(GUC_WOPCM_SIZE, BXT_GUC_WOPCM_SIZE_VALUE);
+       else
+               I915_WRITE(GUC_WOPCM_SIZE, GUC_WOPCM_SIZE_VALUE);
+
        I915_WRITE(DMA_GUC_WOPCM_OFFSET, GUC_WOPCM_OFFSET_VALUE);

        /* Enable MIA caching. GuC clock gating is disabled. */


--
   Peter Antoine (Android Graphics Driver Software Engineer)
   ---------------------------------------------------------------------
   Intel Corporation (UK) Limited
   Registered No. 1134945 (England)
   Registered Office: Pipers Way, Swindon SN3 1RJ
   VAT No: 860 2173 47
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