From: Tvrtko Ursulin <[email protected]> Using four bits for the pin count in the middle of the data structure just makes the compiler generate verbose code.
Signed-off-by: Tvrtko Ursulin <[email protected]> --- drivers/gpu/drm/i915/i915_gem_gtt.h | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.h b/drivers/gpu/drm/i915/i915_gem_gtt.h index d7dd3d8a8758..b4766c4c4bac 100644 --- a/drivers/gpu/drm/i915/i915_gem_gtt.h +++ b/drivers/gpu/drm/i915/i915_gem_gtt.h @@ -213,9 +213,9 @@ struct i915_vma { * and the framebuffer code. When switching/pageflipping, the * framebuffer code has at most two buffers pinned per crtc. * - * In the worst case this is 1 + 1 + 1 + 2*2 = 7. That would fit into 3 - * bits with absolutely no headroom. So use 4 bits. */ - unsigned int pin_count:4; + * In the worst case this is 1 + 1 + 1 + 2*2 = 7. + */ + unsigned int pin_count; #define DRM_I915_GEM_OBJECT_MAX_PIN_COUNT 0xf }; -- 1.9.1 _______________________________________________ Intel-gfx mailing list [email protected] https://lists.freedesktop.org/mailman/listinfo/intel-gfx
