On Thu, May 12, 2016 at 10:15:45AM +0300, Ander Conselvan De Oliveira wrote: > On Wed, 2016-05-11 at 22:04 +0300, [email protected] wrote: > > From: Ville Syrjälä <[email protected]> > > > > SKL DPLLs shouldn't be called DPPLs. > > I really didn't notice that typo. Thanks for fixing. > > Reviewed-by: Ander Conselvan de Oliveira <[email protected]>
Thanks. Pushed to dinq. > > > > > Cc: Ander Conselvan de Oliveira <[email protected]> > > Fixes: 2edd6443e3d0 ("drm/i915: Use a table to initilize shared dplls") > > Signed-off-by: Ville Syrjälä <[email protected]> > > --- > > drivers/gpu/drm/i915/intel_dpll_mgr.c | 6 +++--- > > 1 file changed, 3 insertions(+), 3 deletions(-) > > > > diff --git a/drivers/gpu/drm/i915/intel_dpll_mgr.c > > b/drivers/gpu/drm/i915/intel_dpll_mgr.c > > index 639bf0209c15..3ac705936b04 100644 > > --- a/drivers/gpu/drm/i915/intel_dpll_mgr.c > > +++ b/drivers/gpu/drm/i915/intel_dpll_mgr.c > > @@ -1702,9 +1702,9 @@ static const struct intel_dpll_mgr hsw_pll_mgr = { > > > > static const struct dpll_info skl_plls[] = { > > { "DPLL 0", DPLL_ID_SKL_DPLL0, &skl_ddi_dpll0_funcs, > > INTEL_DPLL_ALWAYS_ON }, > > - { "DPPL 1", DPLL_ID_SKL_DPLL1, &skl_ddi_pll_funcs, 0 }, > > - { "DPPL 2", DPLL_ID_SKL_DPLL2, &skl_ddi_pll_funcs, 0 }, > > - { "DPPL 3", DPLL_ID_SKL_DPLL3, &skl_ddi_pll_funcs, 0 }, > > + { "DPLL 1", DPLL_ID_SKL_DPLL1, &skl_ddi_pll_funcs, 0 }, > > + { "DPLL 2", DPLL_ID_SKL_DPLL2, &skl_ddi_pll_funcs, 0 }, > > + { "DPLL 3", DPLL_ID_SKL_DPLL3, &skl_ddi_pll_funcs, 0 }, > > { NULL, -1, NULL, }, > > }; > > -- Ville Syrjälä Intel OTC _______________________________________________ Intel-gfx mailing list [email protected] https://lists.freedesktop.org/mailman/listinfo/intel-gfx
