On Thu, May 12, 2016 at 04:18:51PM +0300, Imre Deak wrote:
> A failure from these functions can lead to obscure bugs later, so it's
> better not to suppress them and just fail module loading.
Based on a cursory examination looks like this should never fail, but I
suppose having the error handling won't hurt, so
Reviewed-by: Ville Syrjälä <ville.syrj...@linux.intel.com>
>
> Signed-off-by: Imre Deak <imre.d...@intel.com>
> ---
> drivers/gpu/drm/i915/i915_dma.c | 22 ++++++++++++++++++----
> 1 file changed, 18 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_dma.c b/drivers/gpu/drm/i915/i915_dma.c
> index 0eadeb6..a7fa82e 100644
> --- a/drivers/gpu/drm/i915/i915_dma.c
> +++ b/drivers/gpu/drm/i915/i915_dma.c
> @@ -1262,8 +1262,15 @@ static int i915_driver_init_hw(struct drm_i915_private
> *dev_priv)
> pci_set_master(dev->pdev);
>
> /* overlay on gen2 is broken and can't address above 1G */
> - if (IS_GEN2(dev))
> - dma_set_coherent_mask(&dev->pdev->dev, DMA_BIT_MASK(30));
> + if (IS_GEN2(dev)) {
> + ret = dma_set_coherent_mask(&dev->pdev->dev, DMA_BIT_MASK(30));
> + if (ret) {
> + DRM_ERROR("failed to set DMA mask\n");
> +
> + goto out_ggtt;
> + }
> + }
> +
>
> /* 965GM sometimes incorrectly writes to hardware status page (HWS)
> * using 32bit addressing, overwriting memory if HWS is located
> @@ -1273,8 +1280,15 @@ static int i915_driver_init_hw(struct drm_i915_private
> *dev_priv)
> * behaviour if any general state is accessed within a page above 4GB,
> * which also needs to be handled carefully.
> */
> - if (IS_BROADWATER(dev) || IS_CRESTLINE(dev))
> - dma_set_coherent_mask(&dev->pdev->dev, DMA_BIT_MASK(32));
> + if (IS_BROADWATER(dev) || IS_CRESTLINE(dev)) {
> + ret = dma_set_coherent_mask(&dev->pdev->dev, DMA_BIT_MASK(32));
> +
> + if (ret) {
> + DRM_ERROR("failed to set DMA mask\n");
> +
> + goto out_ggtt;
> + }
> + }
>
> aperture_size = ggtt->mappable_end;
>
> --
> 2.5.0
>
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> Intel-gfx@lists.freedesktop.org
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--
Ville Syrjälä
Intel OTC
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