Mika Kuoppala <[email protected]> writes: > [ text/plain ] > According to bspec this workaround helps to reduce lag and improve > performance on edp. >
Bspec says this is for bdw,skl. wa database says this is for bdw and all gen9. If we write to 0x42090 on kbl,skl it doesn't hold value and we get the mmio debug traces as shown in the CI/bat. Lets make this for bdw only as it seems to have this register. -Mika > References: HSD#2134579 > Signed-off-by: Mika Kuoppala <[email protected]> > --- > drivers/gpu/drm/i915/i915_reg.h | 3 +++ > drivers/gpu/drm/i915/intel_pm.c | 8 ++++++++ > 2 files changed, 11 insertions(+) > > diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h > index e3077259541a..1f84c2ff3563 100644 > --- a/drivers/gpu/drm/i915/i915_reg.h > +++ b/drivers/gpu/drm/i915/i915_reg.h > @@ -6035,6 +6035,9 @@ enum skl_disp_power_wells { > #define FORCE_ARB_IDLE_PLANES (1 << 14) > #define SKL_EDP_PSR_FIX_RDWRAP (1 << 3) > > +#define CHICKEN_PAR2_1 _MMIO(0x42090) > +#define KVM_CONFIG_CHANGE_NOTIFICATION_SELECT (1 << 14) > + > #define _CHICKEN_PIPESL_1_A 0x420b0 > #define _CHICKEN_PIPESL_1_B 0x420b4 > #define HSW_FBCQ_DIS (1 << 22) > diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c > index fc34add6ab82..5d9b7ff9dc18 100644 > --- a/drivers/gpu/drm/i915/intel_pm.c > +++ b/drivers/gpu/drm/i915/intel_pm.c > @@ -6870,6 +6870,10 @@ static void skylake_init_clock_gating(struct > drm_device *dev) > /* See Bspec note for PSR2_CTL bit 31, Wa#828:skl */ > I915_WRITE(CHICKEN_PAR1_1, > I915_READ(CHICKEN_PAR1_1) | SKL_EDP_PSR_FIX_RDWRAP); > + > + /* WaKVMNotificationOnConfigChange:skl */ > + I915_WRITE(CHICKEN_PAR2_1, I915_READ(CHICKEN_PAR2_1) > + | KVM_CONFIG_CHANGE_NOTIFICATION_SELECT); > } > > static void broadwell_init_clock_gating(struct drm_device *dev) > @@ -6916,6 +6920,10 @@ static void broadwell_init_clock_gating(struct > drm_device *dev) > */ > I915_WRITE(HSW_GTT_CACHE_EN, GTT_CACHE_EN_ALL); > > + /* WaKVMNotificationOnConfigChange:bdw */ > + I915_WRITE(CHICKEN_PAR2_1, I915_READ(CHICKEN_PAR2_1) > + | KVM_CONFIG_CHANGE_NOTIFICATION_SELECT); > + > lpt_init_clock_gating(dev); > } > > -- > 2.5.0 > > _______________________________________________ > Intel-gfx mailing list > [email protected] > https://lists.freedesktop.org/mailman/listinfo/intel-gfx _______________________________________________ Intel-gfx mailing list [email protected] https://lists.freedesktop.org/mailman/listinfo/intel-gfx
