From: Ville Syrjälä <[email protected]> Add a small helper to parse from the DPCD whether link training is required when exiting PSR main-link off mode.
v2: Rebased Cc: Daniel Vetter <[email protected]> Reviewed-by: Daniel Vetter <[email protected]> Signed-off-by: Ville Syrjälä <[email protected]> --- drivers/gpu/drm/drm_dp_helper.c | 14 ++++++++++++++ include/drm/drm_dp_helper.h | 1 + 2 files changed, 15 insertions(+) diff --git a/drivers/gpu/drm/drm_dp_helper.c b/drivers/gpu/drm/drm_dp_helper.c index 1f914629031e..cc7b55a695b5 100644 --- a/drivers/gpu/drm/drm_dp_helper.c +++ b/drivers/gpu/drm/drm_dp_helper.c @@ -854,3 +854,17 @@ int drm_dp_psr_setup_time(const u8 psr_cap[EDP_PSR_RECEIVER_CAP_SIZE]) EXPORT_SYMBOL(drm_dp_psr_setup_time); #undef PSR_SETUP_TIME + +/** + * drm_dp_psr_need_train_on_exit() - Indicate whether link training is needed on PSR exit + * @psr_cap: PSR capabilities from DPCD + * + * Returns: + * Whether link training is required when exiting PSR main-link off mode. + */ +bool drm_dp_psr_need_train_on_exit(const u8 psr_cap[EDP_PSR_RECEIVER_CAP_SIZE]) +{ + /* DP_PSR_NO_TRAIN_ON_EXIT is "don't care" for PSR2 capable devices */ + return psr_cap[0] < 0x2 && (psr_cap[1] & DP_PSR_NO_TRAIN_ON_EXIT) == 0; +} +EXPORT_SYMBOL(drm_dp_psr_need_train_on_exit); diff --git a/include/drm/drm_dp_helper.h b/include/drm/drm_dp_helper.h index 6aa74f7d45b4..2437f1b6e776 100644 --- a/include/drm/drm_dp_helper.h +++ b/include/drm/drm_dp_helper.h @@ -658,6 +658,7 @@ struct edp_vsc_psr { #define EDP_VSC_PSR_CRC_VALUES_VALID (1<<2) int drm_dp_psr_setup_time(const u8 psr_cap[EDP_PSR_RECEIVER_CAP_SIZE]); +bool drm_dp_psr_need_train_on_exit(const u8 psr_cap[EDP_PSR_RECEIVER_CAP_SIZE]); static inline int drm_dp_max_link_rate(const u8 dpcd[DP_RECEIVER_CAP_SIZE]) -- 2.7.4 _______________________________________________ Intel-gfx mailing list [email protected] https://lists.freedesktop.org/mailman/listinfo/intel-gfx
