Em Qua, 2016-08-17 às 20:49 +0100, Chris Wilson escreveu: > On Wed, Aug 17, 2016 at 04:41:44PM -0300, Paulo Zanoni wrote: > > > > From: Chris Wilson <[email protected]> > > > > intel_fbc_pre_update() depends upon the new state being already > > pinned > > in place in the Global GTT (primarily for both fencing which wants > > both > > an offset and a fence register, if assigned). This requires the > > call to > > intel_fbc_pre_update() be after intel_pin_and_fence_fb() - but > > commit > > e8216e502aca ("drm/i915/fbc: call intel_fbc_pre_update earlier > > during > > page flips") moved the code way too much up in its attempt to call > > it > > before the page flip. > > > > v2 (from Paulo): > > - Point the original bad commit. > > - Add a comment to maybe prevent further regressions. > > > > Fixes: e8216e502aca ("drm/i915/fbc: call intel_fbc_pre_update > > earlier...") > > Signed-off-by: Chris Wilson <[email protected]> > > Signed-off-by: Paulo Zanoni <[email protected]> > > Cc: Daniel Vetter <[email protected]> > > Cc: Ville Syrjälä <[email protected]> > > Cc: Maarten Lankhorst <[email protected]> > > Cc: Patrik Jakobsson <[email protected]> > > Cc: [email protected] > > If you had just claimed this as your own, I could have reviewed it ;)
I don't want to steal your patch, you submitted it first, so you should get the credit. I thought about adding my R-B, but then I remembered reading somewhere that having my Signed-off-by was enough and implicitly meant a R-B. Anyway, feel free to add: Reviewed-by: Paulo Zanoni <[email protected]> (v1) I suppose it would also make sense for you to add R-B: Chris (v2) since I modified the original. Also, feel free to merge this. > -Chris > _______________________________________________ Intel-gfx mailing list [email protected] https://lists.freedesktop.org/mailman/listinfo/intel-gfx
