On Fri, Sep 02, 2016 at 03:03:22PM +0300, David Weinehall wrote:
> On Thu, Sep 01, 2016 at 03:08:16PM -0700, Manasi Navare wrote:
> > According to the DisplayPort Spec, in case of Clock Recovery failure
> > the link training sequence should fall back to the lower link rate
> > followed by lower lane count until CR succeeds.
> > On CR success, the sequence proceeds with Channel EQ.
> > In case of Channel EQ failures, it should fallback to
> > lower link rate and lane count and start the CR phase again.
> > 
> > Signed-off-by: Manasi Navare <manasi.d.nav...@intel.com>
> > ---
> >  drivers/gpu/drm/i915/intel_ddi.c              | 109 
> > +++++++++++++++++++++++---
> >  drivers/gpu/drm/i915/intel_dp_link_training.c |  12 ++-
> >  drivers/gpu/drm/i915/intel_drv.h              |   4 +-
> >  3 files changed, 110 insertions(+), 15 deletions(-)
> > 
> > diff --git a/drivers/gpu/drm/i915/intel_ddi.c 
> > b/drivers/gpu/drm/i915/intel_ddi.c
> > index 67a6a0b..78d6687 100644
> > --- a/drivers/gpu/drm/i915/intel_ddi.c
> > +++ b/drivers/gpu/drm/i915/intel_ddi.c
> > @@ -1634,29 +1634,50 @@ void intel_ddi_clk_select(struct intel_encoder 
> > *encoder,
> >     }
> >  }
> >  
> > -static void intel_ddi_pre_enable_dp(struct intel_encoder *encoder,
> > +static void intel_ddi_pre_enable_edp(struct intel_encoder *encoder,
> >                                 int link_rate, uint32_t lane_count,
> > -                               struct intel_shared_dpll *pll,
> > -                               bool link_mst)
> > +                               struct intel_shared_dpll *pll)
> >  {
> >     struct intel_dp *intel_dp = enc_to_intel_dp(&encoder->base);
> >     struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
> >     enum port port = intel_ddi_get_encoder_port(encoder);
> >  
> >     intel_dp_set_link_params(intel_dp, link_rate, lane_count,
> > -                            link_mst);
> > -   if (encoder->type == INTEL_OUTPUT_EDP)
> > -           intel_edp_panel_on(intel_dp);
> > +                            false);
> > +
> > +   intel_edp_panel_on(intel_dp);
> >  
> >     intel_ddi_clk_select(encoder, pll);
> >     intel_prepare_dp_ddi_buffers(encoder);
> >     intel_ddi_init_dp_buf_reg(encoder);
> >     intel_dp_sink_dpms(intel_dp, DRM_MODE_DPMS_ON);
> >     intel_dp_start_link_train(intel_dp);
> > -   if (port != PORT_A || INTEL_GEN(dev_priv) >= 9)
> > +   if (port != PORT_A || INTEL_INFO(dev_priv)->gen >= 9)
> 
> I think you got this backwards. We *want* to use INTEL_GEN().

Thanks for your review. I think it got reverted due to rebasing.
I will correct it and resend the patch.

Manasi
> 
> [snip]
> 
> 
> Kind regards, David Weinehall
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