On 2023/11/27 22:08, Alexander Lobakin wrote: > From: Yunsheng Lin <[email protected]> > Date: Sat, 25 Nov 2023 20:29:22 +0800 > >> On 2023/11/24 23:47, Alexander Lobakin wrote: >>> After commit 5027ec19f104 ("net: page_pool: split the page_pool_params >>> into fast and slow") that made &page_pool contain only "hot" params at >>> the start, cacheline boundary chops frag API fields group in the middle >>> again. >>> To not bother with this each time fast params get expanded or shrunk, >>> let's just align them to `4 * sizeof(long)`, the closest upper pow-2 to >>> their actual size (2 longs + 2 ints). This ensures 16-byte alignment for >>> the 32-bit architectures and 32-byte alignment for the 64-bit ones, >>> excluding unnecessary false-sharing. >>> >>> Signed-off-by: Alexander Lobakin <[email protected]> >>> --- >>> include/net/page_pool/types.h | 2 +- >>> 1 file changed, 1 insertion(+), 1 deletion(-) >>> >>> diff --git a/include/net/page_pool/types.h b/include/net/page_pool/types.h >>> index e1bb92c192de..989d07b831fc 100644 >>> --- a/include/net/page_pool/types.h >>> +++ b/include/net/page_pool/types.h >>> @@ -127,7 +127,7 @@ struct page_pool { >>> >>> bool has_init_callback; >> >> It seems odd to have only a slow field between tow fast >> field group, isn't it better to move it to the end of >> page_pool or where is more appropriate? > > 1. There will be more in the subsequent patches. > 2. ::has_init_callback happens each new page allocation, it's not slow. > Jakub did put it here for purpose. > >> >>> >>> - long frag_users; >>> + long frag_users __aligned(4 * sizeof(long)); >> >> If we need that, why not just use '____cacheline_aligned_in_smp'? > > It can be an overkill. We don't need a full cacheline, but only these > fields to stay within one, no matter whether they are in the beginning > of it or at the end.
I am still a little lost here, A comment explaining why using '4' in the above would be really helpful here. _______________________________________________ Intel-wired-lan mailing list [email protected] https://lists.osuosl.org/mailman/listinfo/intel-wired-lan
