Tue, May 26, 2026 at 11:34:15AM +0200, [email protected] wrote: >Pins registered with an fwnode may have .state_on_dpll_set implemented >without advertising DPLL_PIN_CAPABILITIES_STATE_CAN_CHANGE upfront. >Requiring the bit for fwnode pins ties firmware description to driver >implementation details unnecessarily. > >Relax the capability check in dpll_pin_state_set() and >dpll_pin_on_pin_state_set(): when a pin has an associated fwnode, bypass >the capability gate and let the ops layer decide, returning -EOPNOTSUPP >if .state_on_dpll_set is absent. Non-fwnode pins retain the original >strict behavior. > >This is used later in the series by the SyncE_Ref output pin, which >relies on the fwnode path for state control. > >Reviewed-by: Aleksandr Loktionov <[email protected]> >Signed-off-by: Grzegorz Nitka <[email protected]>
Reviewed-by: Jiri Pirko <[email protected]>
