On 10/06/2019 14:17, Yong Wu wrote:
> The protect memory setting is a little different in the different SoCs.
> In the register REG_MMU_CTRL_REG(0x110), the TF_PROT(translation fault
> protect) shift bit is normally 4 while it shift 5 bits only in the
> mt8173. This patch delete the complex MACRO and use a common if-else
> instead.
>
> Signed-off-by: Yong Wu <[email protected]>
> Reviewed-by: Evan Green <[email protected]>
Reviewed-by: Matthias Brugger <[email protected]>
> ---
> drivers/iommu/mtk_iommu.c | 13 ++++++-------
> 1 file changed, 6 insertions(+), 7 deletions(-)
>
> diff --git a/drivers/iommu/mtk_iommu.c b/drivers/iommu/mtk_iommu.c
> index ad838b9..d38dfa2 100644
> --- a/drivers/iommu/mtk_iommu.c
> +++ b/drivers/iommu/mtk_iommu.c
> @@ -52,12 +52,9 @@
> #define REG_MMU_DCM_DIS 0x050
>
> #define REG_MMU_CTRL_REG 0x110
> +#define F_MMU_TF_PROT_TO_PROGRAM_ADDR (2 << 4)
> #define F_MMU_PREFETCH_RT_REPLACE_MOD BIT(4)
> -#define F_MMU_TF_PROTECT_SEL_SHIFT(data) \
> - ((data)->plat_data->m4u_plat == M4U_MT2712 ? 4 : 5)
> -/* It's named by F_MMU_TF_PROT_SEL in mt2712. */
> -#define F_MMU_TF_PROTECT_SEL(prot, data) \
> - (((prot) & 0x3) << F_MMU_TF_PROTECT_SEL_SHIFT(data))
> +#define F_MMU_TF_PROT_TO_PROGRAM_ADDR_MT8173 (2 << 5)
>
> #define REG_MMU_IVRP_PADDR 0x114
>
> @@ -519,9 +516,11 @@ static int mtk_iommu_hw_init(const struct mtk_iommu_data
> *data)
> return ret;
> }
>
> - regval = F_MMU_TF_PROTECT_SEL(2, data);
> if (data->plat_data->m4u_plat == M4U_MT8173)
> - regval |= F_MMU_PREFETCH_RT_REPLACE_MOD;
> + regval = F_MMU_PREFETCH_RT_REPLACE_MOD |
> + F_MMU_TF_PROT_TO_PROGRAM_ADDR_MT8173;
> + else
> + regval = F_MMU_TF_PROT_TO_PROGRAM_ADDR;
> writel_relaxed(regval, data->base + REG_MMU_CTRL_REG);
>
> regval = F_L2_MULIT_HIT_EN |
>
