On Mon, Aug 19, 2019 at 07:19:30PM +0100, Robin Murphy wrote:
> Although it's conceptually nice for the io_pgtable_cfg to provide a
> standard VMSA TCR value, the reality is that no VMSA-compliant IOMMU
> looks exactly like an Arm CPU, and they all have various other TCR
> controls which io-pgtable can't be expected to understand. Thus since
> there is an expectation that drivers will have to add to the given TCR
> value anyway, let's strip it down to just the essentials that are
> directly relevant to io-pgatble's inner workings - namely the address
> sizes, walk attributes, and where appropriate, format selection.
> 
> Signed-off-by: Robin Murphy <[email protected]>
> ---
>  drivers/iommu/arm-smmu-v3.c        | 7 +------
>  drivers/iommu/arm-smmu.c           | 1 +
>  drivers/iommu/arm-smmu.h           | 2 ++
>  drivers/iommu/io-pgtable-arm-v7s.c | 6 ++----
>  drivers/iommu/io-pgtable-arm.c     | 4 ----
>  drivers/iommu/qcom_iommu.c         | 2 +-
>  6 files changed, 7 insertions(+), 15 deletions(-)

Hmm, so I'm a bit nervous about this one since I think we really should
be providing a TCR with EPD1 set if we're only giving you TTBR0. Relying
on the driver to do this worries me. See my comments on the next patch.

Will
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