On Wed, 1 Apr 2020 09:32:37 +0200
Auger Eric <[email protected]> wrote:
> > I didn’t read through all comments. Here is a concern with this 2-D
> > table, the iommu cache type is defined as below. I suppose there is
> > a problem here. If I'm using IOMMU_CACHE_INV_TYPE_PASID, it will
> > beyond the 2-D table.
> >
> > /* IOMMU paging structure cache */
> > #define IOMMU_CACHE_INV_TYPE_IOTLB (1 << 0) /* IOMMU IOTLB */
> > #define IOMMU_CACHE_INV_TYPE_DEV_IOTLB (1 << 1) /* Device IOTLB */
> > #define IOMMU_CACHE_INV_TYPE_PASID (1 << 2) /* PASID cache */
> > #define IOMMU_CACHE_INV_TYPE_NR (3)
> oups indeed
I think it is not an issue, since we use bit position not the raw cache
type as index into the 2D array. Right?
for_each_set_bit(cache_type,
ret = to_vtd_granularity(cache_type, inv_info->granularity, &
static inline int to_vtd_granularity(int type, int granu, int *vtd_granu)
{
*vtd_granu = inv_type_granu_table[type][granu];
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