[PATCH v4 4/7] iommu/mediatek: Move inv_sel_reg into the plat_data

[Chao Hao]

For mt6779, MMU_INV_SEL register's offset is changed from
0x38 to 0x2c, so we can put inv_sel_reg in the plat_data to
use it.
In addition, we renamed it to REG_MMU_INV_SEL_GEN1 and use it
before mt6779.

Change since v3:
1. Fix coding style

Cc: Yong Wu <yong...@mediatek.com>
Signed-off-by: Chao Hao <chao....@mediatek.com>
---
 drivers/iommu/mtk_iommu.c | 19 +++++++++++--------
 drivers/iommu/mtk_iommu.h |  1 +
 2 files changed, 12 insertions(+), 8 deletions(-)

diff --git a/drivers/iommu/mtk_iommu.c b/drivers/iommu/mtk_iommu.c
index 239d2cdbbc9f..f23919feba4e 100644
--- a/drivers/iommu/mtk_iommu.c
+++ b/drivers/iommu/mtk_iommu.c
@@ -37,7 +37,7 @@
 #define REG_MMU_INVLD_START_A                  0x024
 #define REG_MMU_INVLD_END_A                    0x028
 
-#define REG_MMU_INV_SEL                                0x038
+#define REG_MMU_INV_SEL_GEN1                   0x038
 #define F_INVLD_EN0                            BIT(0)
 #define F_INVLD_EN1                            BIT(1)
 
@@ -168,7 +168,7 @@ static void mtk_iommu_tlb_flush_all(void *cookie)
 
        for_each_m4u(data) {
                writel_relaxed(F_INVLD_EN1 | F_INVLD_EN0,
-                              data->base + REG_MMU_INV_SEL);
+                              data->base + data->plat_data->inv_sel_reg);
                writel_relaxed(F_ALL_INVLD, data->base + REG_MMU_INVALIDATE);
                wmb(); /* Make sure the tlb flush all done */
        }
@@ -185,7 +185,7 @@ static void mtk_iommu_tlb_flush_range_sync(unsigned long 
iova, size_t size,
        for_each_m4u(data) {
                spin_lock_irqsave(&data->tlb_lock, flags);
                writel_relaxed(F_INVLD_EN1 | F_INVLD_EN0,
-                              data->base + REG_MMU_INV_SEL);
+                              data->base + data->plat_data->inv_sel_reg);
 
                writel_relaxed(iova, data->base + REG_MMU_INVLD_START_A);
                writel_relaxed(iova + size - 1,
@@ -773,11 +773,12 @@ static const struct dev_pm_ops mtk_iommu_pm_ops = {
 };
 
 static const struct mtk_iommu_plat_data mt2712_data = {
-       .m4u_plat     = M4U_MT2712,
-       .has_4gb_mode = true,
-       .has_bclk     = true,
-       .has_vld_pa_rng   = true,
-       .larbid_remap = {0, 1, 2, 3, 4, 5, 6, 7, 8, 9},
+       .m4u_plat       = M4U_MT2712,
+       .has_4gb_mode   = true,
+       .has_bclk       = true,
+       .has_vld_pa_rng = true,
+       .inv_sel_reg    = REG_MMU_INV_SEL_GEN1,
+       .larbid_remap   = {0, 1, 2, 3, 4, 5, 6, 7, 8, 9},
 };
 
 static const struct mtk_iommu_plat_data mt8173_data = {
@@ -785,12 +786,14 @@ static const struct mtk_iommu_plat_data mt8173_data = {
        .has_4gb_mode = true,
        .has_bclk     = true,
        .reset_axi    = true,
+       .inv_sel_reg  = REG_MMU_INV_SEL_GEN1,
        .larbid_remap = {0, 1, 2, 3, 4, 5}, /* Linear mapping. */
 };
 
 static const struct mtk_iommu_plat_data mt8183_data = {
        .m4u_plat     = M4U_MT8183,
        .reset_axi    = true,
+       .inv_sel_reg  = REG_MMU_INV_SEL_GEN1,
        .larbid_remap = {0, 4, 5, 6, 7, 2, 3, 1},
 };
 
diff --git a/drivers/iommu/mtk_iommu.h b/drivers/iommu/mtk_iommu.h
index d711ac630037..afd7a2de5c1e 100644
--- a/drivers/iommu/mtk_iommu.h
+++ b/drivers/iommu/mtk_iommu.h
@@ -43,6 +43,7 @@ struct mtk_iommu_plat_data {
        bool                has_misc_ctrl;
        bool                has_vld_pa_rng;
        bool                reset_axi;
+       u32                 inv_sel_reg;
        unsigned char       larbid_remap[MTK_LARB_NR_MAX];
 };
 
-- 
2.18.0
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