On 2020-07-13 14:44, Will Deacon wrote:
On Tue, Jul 07, 2020 at 10:00:17PM -0700, Krishna Reddy wrote:
Add global/context fault hooks to allow vendor specific implementations
override default fault interrupt handlers.
Update NVIDIA implementation to override the default global/context fault
interrupt handlers and handle interrupts across the two ARM MMU-500s that
are programmed identically.
Signed-off-by: Krishna Reddy <vdu...@nvidia.com>
drivers/iommu/arm-smmu-nvidia.c | 99 +++++++++++++++++++++++++++++++++
drivers/iommu/arm-smmu.c | 17 +++++-
drivers/iommu/arm-smmu.h | 3 +
3 files changed, 117 insertions(+), 2 deletions(-)
Given that faults shouldn't occur during normal operation, is this patch
Indeed they shouldn't, but if something *does* happen to go wrong then I
think it's worth having proper handling in place, since the consequences
otherwise include a screaming "spurious" fault or just silently losing
some transactions and possibly locking up part of the system altogether
(depending on HUPCF at least - I recall MMU-500 also behaving funnily
WRT TLB maintenance while an IRQ is outstanding, but that was long
enough ago that it might have been related to the old CFCFG behaviour).
Until we sort out the reserved memory regions thing (the new IORT spec
is due Real Soon Now(TM)...) some systems are going to keep suffering
transient context faults during boot - those may make the display
unhappy until it gets reset, but we certainly don't want to invite the
possibility of them wedging the SMMU itself.
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