Hi,

Bcc can be installed on ubuntu 16.04/arm64 successfully, but when
I try to trace, the folllowing failure[1] is triggered.

So is bcc not ready for arm64? Or something is wrong?

BTW, clang/llvm is 3.8, and I am happy to try any patches/tests
if you have ideas about the issue.

Thanks,
Ming

[1], ubuntu@ubuntu:/usr/share/bcc/tools$ sudo ./trace sys_open
In file included from /virtual/main.c:2:
In file included from include/linux/ptrace.h:5:
In file included from include/linux/sched.h:17:
In file included from include/linux/kernel.h:13:
In file included from include/linux/printk.h:8:
In file included from include/linux/cache.h:5:
In file included from ./arch/arm64/include/asm/cache.h:19:
In file included from ./arch/arm64/include/asm/cachetype.h:19:
In file included from ./arch/arm64/include/asm/cputype.h:94:
./arch/arm64/include/asm/sysreg.h:260:43: warning: value size does not
match register
      size specified by the constraint and modifier [-Wasm-operand-widths]
        asm volatile("mrs %0, sctlr_el1" : "=r" (val));
                                                 ^
./arch/arm64/include/asm/sysreg.h:260:20: note: use constraint modifier "w"
        asm volatile("mrs %0, sctlr_el1" : "=r" (val));
                          ^~
                          %w0
./arch/arm64/include/asm/sysreg.h:263:44: warning: value size does not
match register
      size specified by the constraint and modifier [-Wasm-operand-widths]
        asm volatile("msr sctlr_el1, %0" : : "r" (val));
                                                  ^
./arch/arm64/include/asm/sysreg.h:263:31: note: use constraint modifier "w"
        asm volatile("msr sctlr_el1, %0" : : "r" (val));
                                     ^~
                                     %w0
In file included from /virtual/main.c:2:
In file included from include/linux/ptrace.h:5:
In file included from include/linux/sched.h:19:
In file included from include/linux/timex.h:65:
In file included from ./arch/arm64/include/asm/timex.h:19:
./arch/arm64/include/asm/arch_timer.h:41:50: warning: value size does
not match register
      size specified by the constraint and modifier [-Wasm-operand-widths]
                        asm volatile("msr cntp_ctl_el0,  %0" : : "r" (val));
                                                                      ^
./arch/arm64/include/asm/arch_timer.h:41:37: note: use constraint modifier "w"
                        asm volatile("msr cntp_ctl_el0,  %0" : : "r" (val));
                                                         ^~
                                                         %w0
./arch/arm64/include/asm/arch_timer.h:44:50: warning: value size does
not match register
      size specified by the constraint and modifier [-Wasm-operand-widths]
                        asm volatile("msr cntp_tval_el0, %0" : : "r" (val));
                                                                      ^
./arch/arm64/include/asm/arch_timer.h:44:37: note: use constraint modifier "w"
                        asm volatile("msr cntp_tval_el0, %0" : : "r" (val));
                                                         ^~
                                                         %w0
./arch/arm64/include/asm/arch_timer.h:50:50: warning: value size does
not match register
      size specified by the constraint and modifier [-Wasm-operand-widths]
                        asm volatile("msr cntv_ctl_el0,  %0" : : "r" (val));
                                                                      ^
./arch/arm64/include/asm/arch_timer.h:50:37: note: use constraint modifier "w"
                        asm volatile("msr cntv_ctl_el0,  %0" : : "r" (val));
                                                         ^~
                                                         %w0
./arch/arm64/include/asm/arch_timer.h:53:50: warning: value size does
not match register
      size specified by the constraint and modifier [-Wasm-operand-widths]
                        asm volatile("msr cntv_tval_el0, %0" : : "r" (val));
                                                                      ^
./arch/arm64/include/asm/arch_timer.h:53:37: note: use constraint modifier "w"
                        asm volatile("msr cntv_tval_el0, %0" : : "r" (val));
                                                         ^~
                                                         %w0
./arch/arm64/include/asm/arch_timer.h:69:49: warning: value size does
not match register
      size specified by the constraint and modifier [-Wasm-operand-widths]
                        asm volatile("mrs %0,  cntp_ctl_el0" : "=r" (val));
                                                                     ^
./arch/arm64/include/asm/arch_timer.h:69:22: note: use constraint modifier "w"
                        asm volatile("mrs %0,  cntp_ctl_el0" : "=r" (val));
                                          ^~
                                          %w0
./arch/arm64/include/asm/arch_timer.h:72:49: warning: value size does
not match register
      size specified by the constraint and modifier [-Wasm-operand-widths]
                        asm volatile("mrs %0, cntp_tval_el0" : "=r" (val));
                                                                     ^
./arch/arm64/include/asm/arch_timer.h:72:22: note: use constraint modifier "w"
                        asm volatile("mrs %0, cntp_tval_el0" : "=r" (val));
                                          ^~
                                          %w0
./arch/arm64/include/asm/arch_timer.h:78:49: warning: value size does
not match register
      size specified by the constraint and modifier [-Wasm-operand-widths]
                        asm volatile("mrs %0,  cntv_ctl_el0" : "=r" (val));
                                                                     ^
./arch/arm64/include/asm/arch_timer.h:78:22: note: use constraint modifier "w"
                        asm volatile("mrs %0,  cntv_ctl_el0" : "=r" (val));
                                          ^~
                                          %w0
./arch/arm64/include/asm/arch_timer.h:81:49: warning: value size does
not match register
      size specified by the constraint and modifier [-Wasm-operand-widths]
                        asm volatile("mrs %0, cntv_tval_el0" : "=r" (val));
                                                                     ^
./arch/arm64/include/asm/arch_timer.h:81:22: note: use constraint modifier "w"
                        asm volatile("mrs %0, cntv_tval_el0" : "=r" (val));
                                          ^~
                                          %w0
./arch/arm64/include/asm/arch_timer.h:92:46: warning: value size does
not match register
      size specified by the constraint and modifier [-Wasm-operand-widths]
        asm volatile("mrs %0,   cntfrq_el0" : "=r" (val));
                                                    ^
./arch/arm64/include/asm/arch_timer.h:92:20: note: use constraint modifier "w"
        asm volatile("mrs %0,   cntfrq_el0" : "=r" (val));
                          ^~
                          %w0
./arch/arm64/include/asm/arch_timer.h:99:45: warning: value size does
not match register
      size specified by the constraint and modifier [-Wasm-operand-widths]
        asm volatile("mrs       %0, cntkctl_el1" : "=r" (cntkctl));
                                                         ^
./arch/arm64/include/asm/arch_timer.h:99:20: note: use constraint modifier "w"
        asm volatile("mrs       %0, cntkctl_el1" : "=r" (cntkctl));
                                ^~
                                %w0
./arch/arm64/include/asm/arch_timer.h:105:46: warning: value size does
not match register
      size specified by the constraint and modifier [-Wasm-operand-widths]
        asm volatile("msr       cntkctl_el1, %0" : : "r" (cntkctl));
                                                          ^
./arch/arm64/include/asm/arch_timer.h:105:33: note: use constraint modifier "w"
        asm volatile("msr       cntkctl_el1, %0" : : "r" (cntkctl));
                                             ^~
                                             %w0
13 warnings generated.
LLVM ERROR: Inline asm not supported by this streamer because we don't
have an asm parser for this target
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