Hi Jan,
On 02/03/2017 09:12 AM, Jan Kiszka wrote:
Hi Vitaly,
On 2017-02-03 14:57, Vitaly Andrianov wrote:
Hello,
I'm working on Jailhouse support for TI AM572x SOC (2 A15 cores). So
Linux running as a root cell on the CORE 0 and on another core I run a
bare-metal application. As far as MMU is disabled application can enable
I-cache only. And I tested that it works reasonably fast if running on
the CORE 1 w/o enabling hyper-visor (I loaded the application through
JTAG and ran). If I run this application as an inmate it works several
times slower. I checked the I-cache is enabled, but likes like it
doesn't help.
Does anybody know why is that?
There are two possible reasons:
- Virtualization and/or how Jailhouse uses it defeats the enabling of
the I-cache - I would have to dig into the nasty details again to
rule this out.
So, that means that I-cache doesn't work even if it is enabled, doesn't
it?
- Something else slows things down so much that the I-cache cannot save
your day - did you check the vmexit stats of your inmate?
How do I interpret the stats? Here is it.
Statistics for AM57XX-EVM-PDK-LED cell
COUNTER SUM PER SEC
vmexits_total 5 0
vmexits_cp15 3 0
vmexits_management 2 0
vmexits_hypercall 0 0
vmexits_maintenance 0 0
vmexits_mmio 0 0
vmexits_psci 0 0
vmexits_virt_irq 0 0
vmexits_virt_sgi 0 0
That said, I once had some hack to enable MMU and all caches for the
inmates. But it was actually counter-productive, at least for the
latency test. Historic fragments below (may no longer apply).
The root-cell works pretty fast :) I was told that the ARM has something
undocumented related to two step address translation and caches. To make
caches to work MMU has to be enabled for VA->IVA step.
So, I'm working on enabling MMU for my inmate app and see how it will
behave.
Thank you,
-Vitaly
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