On 2017-02-03 16:34, Vitaly Andrianov wrote: > Hi Jan, > > On 02/03/2017 09:12 AM, Jan Kiszka wrote: >> Hi Vitaly, >> >> On 2017-02-03 14:57, Vitaly Andrianov wrote: >>> Hello, >>> >>> I'm working on Jailhouse support for TI AM572x SOC (2 A15 cores). So >>> Linux running as a root cell on the CORE 0 and on another core I run a >>> bare-metal application. As far as MMU is disabled application can enable >>> I-cache only. And I tested that it works reasonably fast if running on >>> the CORE 1 w/o enabling hyper-visor (I loaded the application through >>> JTAG and ran). If I run this application as an inmate it works several >>> times slower. I checked the I-cache is enabled, but likes like it >>> doesn't help. >>> >>> Does anybody know why is that? >> >> There are two possible reasons: >> >> - Virtualization and/or how Jailhouse uses it defeats the enabling of >> the I-cache - I would have to dig into the nasty details again to >> rule this out. > > So, that means that I-cache doesn't work even if it is enabled, doesn't it?
I /may/ not work - it's just a theory, I didn't check the manuals again regarding the precise requirements. > >> >> - Something else slows things down so much that the I-cache cannot save >> your day - did you check the vmexit stats of your inmate? >> > > How do I interpret the stats? Here is it. > > Statistics for AM57XX-EVM-PDK-LED cell > > COUNTER SUM PER SEC > vmexits_total 5 0 > vmexits_cp15 3 0 > vmexits_management 2 0 > vmexits_hypercall 0 0 > vmexits_maintenance 0 0 > vmexits_mmio 0 0 > vmexits_psci 0 0 > vmexits_virt_irq 0 0 > vmexits_virt_sgi 0 0 > No exists at all after boot, even no interrupts. You are just running compute workload? > > >> That said, I once had some hack to enable MMU and all caches for the >> inmates. But it was actually counter-productive, at least for the >> latency test. Historic fragments below (may no longer apply). > > The root-cell works pretty fast :) The root cell, just like non-root Linux cells, run with all bells and whistles (caches) enabled, and that is known to work - as you noticed ;). > I was told that the ARM has something > undocumented related to two step address translation and caches. To make > caches to work MMU has to be enabled for VA->IVA step. > So, I'm working on enabling MMU for my inmate app and see how it will > behave. Yep, then we will know better. Jan -- Siemens AG, Corporate Technology, CT RDA ITP SES-DE Corporate Competence Center Embedded Linux -- You received this message because you are subscribed to the Google Groups "Jailhouse" group. To unsubscribe from this group and stop receiving emails from it, send an email to [email protected]. For more options, visit https://groups.google.com/d/optout.
