On 2017-03-16 23:17, Ralf Ramsauer wrote: > Definition of bits of sysregs belong to the definition of the > register itself. Move those definition over to sysregs.h, which > is also shared with inmates that might want to use it. > > No functional change. > > Signed-off-by: Ralf Ramsauer <[email protected]> > --- > hypervisor/arch/arm/include/asm/processor.h | 4 ---- > hypervisor/arch/arm/include/asm/sysregs.h | 3 +++ > hypervisor/arch/arm64/include/asm/processor.h | 4 ---- > hypervisor/arch/arm64/include/asm/sysregs.h | 4 ++++ > 4 files changed, 7 insertions(+), 8 deletions(-) > > diff --git a/hypervisor/arch/arm/include/asm/processor.h > b/hypervisor/arch/arm/include/asm/processor.h > index 432c0da872..129a5511e0 100644 > --- a/hypervisor/arch/arm/include/asm/processor.h > +++ b/hypervisor/arch/arm/include/asm/processor.h > @@ -40,10 +40,6 @@ > #define RESET_PSR (PSR_I_BIT | PSR_F_BIT | PSR_A_BIT | PSR_SVC_MODE \ > | PSR_32_BIT) > > -#define MPIDR_CPUID_MASK 0x00ffffff > -#define MPIDR_MP_BIT (1 << 31) > -#define MPIDR_U_BIT (1 << 30) > - > #define PFR1_VIRT(pfr) ((pfr) >> 12 & 0xf) > > #define SCTLR_M_BIT (1 << 0) > diff --git a/hypervisor/arch/arm/include/asm/sysregs.h > b/hypervisor/arch/arm/include/asm/sysregs.h > index 9562936035..669d84224d 100644 > --- a/hypervisor/arch/arm/include/asm/sysregs.h > +++ b/hypervisor/arch/arm/include/asm/sysregs.h > @@ -31,6 +31,9 @@ > */ > #define CTR_EL0 SYSREG_32(0, c0, c0, 1) > #define MPIDR_EL1 SYSREG_32(0, c0, c0, 5) > +#define MPIDR_CPUID_MASK 0x00ffffff > +#define MPIDR_MP_BIT (1 << 31) > +#define MPIDR_U_BIT (1 << 30) > #define ID_PFR0_EL1 SYSREG_32(0, c0, c1, 0) > #define ID_PFR1_EL1 SYSREG_32(0, c0, c1, 1) > #define SCTLR_EL1 SYSREG_32(0, c1, c0, 0) > diff --git a/hypervisor/arch/arm64/include/asm/processor.h > b/hypervisor/arch/arm64/include/asm/processor.h > index d4428297e3..efb470a073 100644 > --- a/hypervisor/arch/arm64/include/asm/processor.h > +++ b/hypervisor/arch/arm64/include/asm/processor.h > @@ -32,10 +32,6 @@ > #define RESET_PSR (PSR_D_BIT | PSR_A_BIT | PSR_I_BIT | PSR_F_BIT \ > | PSR_MODE_EL1h) > > -#define MPIDR_CPUID_MASK 0xff00ffffff > -#define MPIDR_MP_BIT (1 << 31) > -#define MPIDR_U_BIT (1 << 30) > - > #define SCTLR_M_BIT (1 << 0) > #define SCTLR_A_BIT (1 << 1) > #define SCTLR_C_BIT (1 << 2) > diff --git a/hypervisor/arch/arm64/include/asm/sysregs.h > b/hypervisor/arch/arm64/include/asm/sysregs.h > index fa13ea316c..4c932111f1 100644 > --- a/hypervisor/arch/arm64/include/asm/sysregs.h > +++ b/hypervisor/arch/arm64/include/asm/sysregs.h > @@ -15,6 +15,10 @@ > > #ifndef __ASSEMBLY__ > > +#define MPIDR_CPUID_MASK 0xff00ffffff > +#define MPIDR_MP_BIT (1 << 31) > +#define MPIDR_U_BIT (1 << 30) > + > #define arm_write_sysreg(sysreg, val) \ > asm volatile ("msr "#sysreg", %0\n" : : "r"((u64)(val))) > >
There are many, many more sysreg definition split like this. We either reorganize consistently or not at all. I'm holding back this patch for now. Jan -- You received this message because you are subscribed to the Google Groups "Jailhouse" group. To unsubscribe from this group and stop receiving emails from it, send an email to [email protected]. For more options, visit https://groups.google.com/d/optout.
