On 2017-09-04 15:25, Ralf Ramsauer wrote: > Bits [31:24] are reserved. Hide them when reading the irqn. > > Signed-off-by: Ralf Ramsauer <[email protected]> > --- > hypervisor/arch/arm/include/asm/gic_v3.h | 6 +++--- > 1 file changed, 3 insertions(+), 3 deletions(-) > > diff --git a/hypervisor/arch/arm/include/asm/gic_v3.h > b/hypervisor/arch/arm/include/asm/gic_v3.h > index 650a81d4..87efbdc5 100644 > --- a/hypervisor/arch/arm/include/asm/gic_v3.h > +++ b/hypervisor/arch/arm/include/asm/gic_v3.h > @@ -257,10 +257,10 @@ static inline void gic_write_lr(unsigned int n, u64 val) > > static inline u32 gic_read_iar_irqn(void) > { > - u32 irq_id; > + u32 iar; > > - arm_read_sysreg(ICC_IAR1_EL1, irq_id); > - return irq_id; > + arm_read_sysreg(ICC_IAR1_EL1, iar); > + return iar & 0xffffff; > } > > void gicv3_handle_sgir_write(u64 sgir); >
Thanks, both are in next now. Jan -- Siemens AG, Corporate Technology, CT RDA ITP SES-DE Corporate Competence Center Embedded Linux -- You received this message because you are subscribed to the Google Groups "Jailhouse" group. To unsubscribe from this group and stop receiving emails from it, send an email to [email protected]. For more options, visit https://groups.google.com/d/optout.
