From: Jan von Wiarda <[email protected]>

- remove access to clock registers for linux and uart demo
- make use of clock register and gate number during debug console setup

Signed-off-by: Jan von Wiarda <[email protected]>
---
 configs/dts/inmate-emtrion-emconrzg1m.dts | 275 ------------------------------
 configs/emtrion-rzg1m-linux-demo.c        |   9 +-
 configs/emtrion-rzg1m-uart-demo.c         |   9 +-
 configs/emtrion-rzg1m.c                   |   4 +-
 4 files changed, 4 insertions(+), 293 deletions(-)

diff --git a/configs/dts/inmate-emtrion-emconrzg1m.dts 
b/configs/dts/inmate-emtrion-emconrzg1m.dts
index 14fa9aa..c817740 100644
--- a/configs/dts/inmate-emtrion-emconrzg1m.dts
+++ b/configs/dts/inmate-emtrion-emconrzg1m.dts
@@ -14,7 +14,6 @@
  */
 
 #include <dt-bindings/interrupt-controller/arm-gic.h>
-#include <dt-bindings/clock/r8a7743-clock.h>
 #include <dt-bindings/power/r8a7743-sysc.h>
 
 /dts-v1/;
@@ -78,276 +77,6 @@
                                (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
        };
 
-       clocks {
-               #address-cells = <0x2>;
-               #size-cells = <0x2>;
-               ranges;
-
-               /* External root clock */
-               extal_clk: extal_clk {
-                       compatible = "fixed-clock";
-                       #clock-cells = <0>;
-                       clock-frequency = <20000000>;
-                       clock-output-names = "extal";
-               };
-
-               audio_clka {
-                       compatible = "fixed-clock";
-                       #clock-cells = <0x0>;
-                       clock-frequency = <0x0>;
-                       clock-output-names = "audio_clka";
-               };
-               audio_clkb {
-                       compatible = "fixed-clock";
-                       #clock-cells = <0x0>;
-                       clock-frequency = <0x0>;
-                       clock-output-names = "audio_clkb";
-               };
-               audio_clkc {
-                       compatible = "fixed-clock";
-                       #clock-cells = <0x0>;
-                       clock-frequency = <0x0>;
-                       clock-output-names = "audio_clkc";
-               };
-
-               /* Special CPG clocks */
-               cpg_clocks: cpg_clocks@e6150000 {
-                       compatible = "renesas,r8a7743-cpg-clocks",
-                                    "renesas,rcar-gen2-cpg-clocks";
-                       reg = <0 0xe6150000 0 0x1000>;
-                       clocks = <&extal_clk>;
-                       #clock-cells = <1>;
-                       clock-output-names = "main", "pll0", "pll1", "pll3",
-                                            "lb", "qspi", "sdh", "sd0";
-                       #power-domain-cells = <0>;
-               };
-
-               /* Variable factor clocks */
-               sd2_clk: sd2_clk@e6150078 {
-                       compatible = "renesas,r8a7743-div6-clock",
-                                    "renesas,cpg-div6-clock";
-                       reg = <0x0 0xe6150078 0x0 0x4>;
-                       clocks = <0x3>;
-                       #clock-cells = <0x0>;
-                       clock-output-names = "sd2";
-               };
-               sd3_clk: sd3_clk@e615026c {
-                       compatible = "renesas,r8a7743-div6-clock",
-                                    "renesas,cpg-div6-clock";
-                       reg = <0x0 0xe615026c 0x0 0x4>;
-                       clocks = <0x3>;
-                       #clock-cells = <0x0>;
-                       clock-output-names = "sd3";
-               };
-               mmc0_clk: mmc0_clk@e6150240 {
-                       compatible = "renesas,r8a7743-div6-clock",
-                                    "renesas,cpg-div6-clock";
-                       reg = <0x0 0xe6150240 0x0 0x4>;
-                       clocks = <0x3>;
-                       #clock-cells = <0x0>;
-                       clock-output-names = "mmc0";
-               };
-
-               /* Fixed factor clocks */
-               pll1_div2_clk: pll1_div2_clk {
-                       compatible = "fixed-factor-clock";
-                       clocks = <&cpg_clocks R8A7743_CLK_PLL1>;
-                       #clock-cells = <0>;
-                       clock-div = <2>;
-                       clock-mult = <1>;
-                       clock-output-names = "pll1_div2";
-               };
-
-               z2: z2 {
-                       compatible = "fixed-factor-clock";
-                       clocks = <&cpg_clocks R8A7743_CLK_PLL0>;
-                       #clock-cells = <0>;
-                       clock-div = <3>;
-                       clock-mult = <1>;
-                       clock-output-names = "z2";
-               };
-
-               zg_clk: zg_clk {
-                       compatible = "fixed-factor-clock";
-                       clocks = <&cpg_clocks R8A7743_CLK_PLL1>;
-                       #clock-cells = <0>;
-                       clock-div = <6>;
-                       clock-mult = <1>;
-                       clock-output-names = "zg";
-               };
-
-               zx_clk: zx_clk {
-                       compatible = "fixed-factor-clock";
-                       clocks = <&cpg_clocks R8A7743_CLK_PLL1>;
-                       #clock-cells = <0>;
-                       clock-div = <3>;
-                       clock-mult = <1>;
-                       clock-output-names = "zx";
-               };
-
-               zs_clk: zs_clk {
-                       compatible = "fixed-factor-clock";
-                       clocks = <&cpg_clocks R8A7743_CLK_PLL1>;
-                       #clock-cells = <0>;
-                       clock-div = <6>;
-                       clock-mult = <1>;
-                       clock-output-names = "zs";
-               };
-
-               /* Fixed factor clocks */
-               hp_clk: hp_clk {
-                       compatible = "fixed-factor-clock";
-                       clocks = <&cpg_clocks R8A7743_CLK_PLL1>;
-                       #clock-cells = <0>;
-                       clock-div = <12>;
-                       clock-mult = <1>;
-                       clock-output-names = "hp";
-               };
-               i_clk: i_clk {
-                       compatible = "fixed-factor-clock";
-                       clocks = <&cpg_clocks R8A7743_CLK_PLL1>;
-                       #clock-cells = <0>;
-                       clock-div = <2>;
-                       clock-mult = <1>;
-                       clock-output-names = "i";
-               };
-               b_clk: b_clk {
-                       compatible = "fixed-factor-clock";
-                       clocks = <&cpg_clocks R8A7743_CLK_PLL1>;
-                       #clock-cells = <0>;
-                       clock-div = <12>;
-                       clock-mult = <1>;
-                       clock-output-names = "b";
-               };
-               p_clk: p_clk {
-                       compatible = "fixed-factor-clock";
-                       clocks = <&cpg_clocks R8A7743_CLK_PLL1>;
-                       #clock-cells = <0>;
-                       clock-div = <24>;
-                       clock-mult = <1>;
-                       clock-output-names = "p";
-               };
-               cl_clk: cl_clk {
-                       compatible = "fixed-factor-clock";
-                       clocks = <&cpg_clocks R8A7743_CLK_PLL1>;
-                       #clock-cells = <0>;
-                       clock-div = <48>;
-                       clock-mult = <1>;
-                       clock-output-names = "cl";
-               };
-               m2_clk: m2_clk {
-                       compatible = "fixed-factor-clock";
-                       clocks = <&cpg_clocks R8A7743_CLK_PLL1>;
-                       #clock-cells = <0>;
-                       clock-div = <8>;
-                       clock-mult = <1>;
-                       clock-output-names = "m2";
-               };
-               imp_clk: imp_clk {
-                       compatible = "fixed-factor-clock";
-                       clocks = <&cpg_clocks R8A7743_CLK_PLL1>;
-                       #clock-cells = <0>;
-                       clock-div = <4>;
-                       clock-mult = <1>;
-                       clock-output-names = "imp";
-               };
-               rclk_clk: rclk_clk {
-                       compatible = "fixed-factor-clock";
-                       clocks = <&cpg_clocks R8A7743_CLK_PLL1>;
-                       #clock-cells = <0>;
-                       clock-div = <(48 * 1024)>;
-                       clock-mult = <1>;
-                       clock-output-names = "rclk";
-               };
-               oscclk_clk: oscclk_clk {
-                       compatible = "fixed-factor-clock";
-                       clocks = <&cpg_clocks R8A7743_CLK_PLL1>;
-                       #clock-cells = <0>;
-                       clock-div = <(12 * 1024)>;
-                       clock-mult = <1>;
-                       clock-output-names = "oscclk";
-               };
-               zb3_clk: zb3_clk {
-                       compatible = "fixed-factor-clock";
-                       clocks = <&cpg_clocks R8A7743_CLK_PLL1>;
-                       #clock-cells = <0>;
-                       clock-div = <4>;
-                       clock-mult = <1>;
-                       clock-output-names = "zb3";
-               };
-               zb3d2_clk: zb3d2_clk {
-                       compatible = "fixed-factor-clock";
-                       clocks = <&cpg_clocks R8A7743_CLK_PLL1>;
-                       #clock-cells = <0>;
-                       clock-div = <8>;
-                       clock-mult = <1>;
-                       clock-output-names = "zb3d2";
-               };
-               ddr_clk: ddr_clk {
-                       compatible = "fixed-factor-clock";
-                       clocks = <&cpg_clocks R8A7743_CLK_PLL1>;
-                       #clock-cells = <0>;
-                       clock-div = <8>;
-                       clock-mult = <1>;
-                       clock-output-names = "ddr";
-               };
-               mp_clk: mp_clk {
-                       compatible = "fixed-factor-clock";
-                       clocks = <&pll1_div2_clk>;
-                       #clock-cells = <0>;
-                       clock-div = <15>;
-                       clock-mult = <1>;
-                       clock-output-names = "mp";
-               };
-               cp_clk: cp_clk {
-                       compatible = "fixed-factor-clock";
-                       clocks = <&cpg_clocks R8A7743_CLK_PLL1>;
-                       #clock-cells = <0>;
-                       clock-div = <48>;
-                       clock-mult = <1>;
-                       clock-output-names = "cp";
-               };
-               acp_clk: acp_clk {
-                       compatible = "fixed-factor-clock";
-                       clocks = <&extal_clk>;
-                       #clock-cells = <0>;
-                       clock-div = <2>;
-                       clock-mult = <1>;
-                       clock-output-names = "acp";
-               };
-
-               /* Gate clocks */
-               mstp3_clks: mstp3_clks@e615013c {
-                       compatible = "renesas,r8a7743-mstp-clocks",
-                                    "renesas,cpg-mstp-clocks";
-                       reg = <0 0xe615013c 0 4>, <0 0xe6150048 0 4>;
-                       clocks = <&cpg_clocks R8A7743_CLK_SD0>;
-                       #clock-cells = <1>;
-                       clock-indices = <R8A7743_CLK_SDHI0>;
-                       clock-output-names = "sdhi0";
-               };
-
-               mstp7_clks: mstp7_clks@e615014c {
-                       compatible = "renesas,r8a7743-mstp-clocks",
-                                    "renesas,cpg-mstp-clocks";
-                       reg = <0 0xe615014c 0 4>, <0 0xe61501c4 0 4>;
-                       clocks = <&p_clk>;
-                       #clock-cells = <1>;
-                       clock-indices = <R8A7743_CLK_SCIF4>;
-                       clock-output-names = "scif4";
-               };
-
-               mstp9_clks: mstp9_clks@e6150994 {
-                       compatible = "renesas,r8a7743-mstp-clocks",
-                                    "renesas,cpg-mstp-clocks";
-                       reg = <0 0xe6150994 0 4>, <0 0xe61509a4 0 4>;
-                       clocks = <&hp_clk>;
-                       #clock-cells = <1>;
-                       clock-indices = <R8A7743_CLK_I2C2>;
-                       clock-output-names = "i2c2";
-               };
-       };
-
        vcc_sdhi0: regulator@0 {
                compatible = "regulator-fixed";
 
@@ -410,8 +139,6 @@
                compatible = "renesas,scif-r8a7743", "renesas,scif";
                reg = <0 0xe6ee0000 0 0x40>;
                interrupts = <0 24 IRQ_TYPE_LEVEL_HIGH>;
-               clocks = <&mstp7_clks R8A7743_CLK_SCIF4>;
-               clock-names = "sci_ick";
                power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
                status = "okay";
                pinctrl-0 = <0x12>;
@@ -422,7 +149,6 @@
                compatible = "renesas,sdhi-r8a7743";
                reg = <0 0xee100000 0 0x200>;
                interrupts = <0 165 IRQ_TYPE_LEVEL_HIGH>;
-               clocks = <&mstp3_clks R8A7743_CLK_SDHI0>;
                power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
                status = "okay";
                vmmc-supply = <&vcc_sdhi0>;
@@ -433,7 +159,6 @@
                compatible = "renesas,i2c-r8a7743";
                reg = <0 0xe6530000 0 0x40>;
                interrupts = <0 286 IRQ_TYPE_LEVEL_HIGH>;
-               clocks = <&mstp9_clks R8A7743_CLK_I2C2>;
                power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
                #address-cells = <1>;
                #size-cells = <0>;
diff --git a/configs/emtrion-rzg1m-linux-demo.c 
b/configs/emtrion-rzg1m-linux-demo.c
index 6d11afd..f53e6c4 100644
--- a/configs/emtrion-rzg1m-linux-demo.c
+++ b/configs/emtrion-rzg1m-linux-demo.c
@@ -21,7 +21,7 @@
 struct {
        struct jailhouse_cell_desc cell;
        __u64 cpus[1];
-       struct jailhouse_memory mem_regions[13];
+       struct jailhouse_memory mem_regions[12];
        struct jailhouse_irqchip irqchips[3];
        struct jailhouse_pci_device pci_devices[1];
 } __attribute__((packed)) config = {
@@ -43,13 +43,6 @@ struct {
        },
 
        .mem_regions = {
-               /* CPG (HACK) */ {
-                       .phys_start = 0xe6150000,
-                       .virt_start = 0xe6150000,
-                       .size = 0x1000,
-                       .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
-                               JAILHOUSE_MEM_IO | JAILHOUSE_MEM_IO_32,
-               },
                /* RST, MODEMR */ {
                        .phys_start = 0xe6160060,
                        .virt_start = 0xe6160060,
diff --git a/configs/emtrion-rzg1m-uart-demo.c 
b/configs/emtrion-rzg1m-uart-demo.c
index 2fe89de..d37c11a 100644
--- a/configs/emtrion-rzg1m-uart-demo.c
+++ b/configs/emtrion-rzg1m-uart-demo.c
@@ -21,7 +21,7 @@
 struct {
        struct jailhouse_cell_desc cell;
        __u64 cpus[1];
-       struct jailhouse_memory mem_regions[3];
+       struct jailhouse_memory mem_regions[2];
 } __attribute__((packed)) config = {
        .cell = {
                .signature = JAILHOUSE_CELL_DESC_SIGNATURE,
@@ -38,13 +38,6 @@ struct {
        },
 
        .mem_regions = {
-               /* CPG (HACK) */ {
-                       .phys_start = 0xe6150000,
-                       .virt_start = 0xe6150000,
-                       .size = 0x1000,
-                       .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
-                               JAILHOUSE_MEM_IO | JAILHOUSE_MEM_IO_32,
-               },
                /* SCIF4 */ {
                        .phys_start = 0xe6ee0000,
                        .virt_start = 0xe6ee0000,
diff --git a/configs/emtrion-rzg1m.c b/configs/emtrion-rzg1m.c
index 254c837..16d3d5d 100644
--- a/configs/emtrion-rzg1m.c
+++ b/configs/emtrion-rzg1m.c
@@ -35,8 +35,8 @@ struct {
                .debug_console = {
                        .address = 0xe62c0000,
                        .size = 0x1000,
-                       /* .clock_reg = 0xe615014c, */
-                       /* .gate_nr = 13, */
+                       .clock_reg = 0xe615014c,
+                       .gate_nr = 17,
                        /* .divider = 0x2e, */
                        .flags = JAILHOUSE_CON1_TYPE_HSCIF |
                                 JAILHOUSE_CON1_ACCESS_MMIO |
-- 
2.11.0

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