On 2017-11-16 16:09, [email protected] wrote:
> From: Ruediger Fichter <[email protected]>
> 
> - initialize clock register correctly

A better commit message would state why we need this change: to enable
the clock gate that might have been turned off is the root cell is not
using the UART, right?

> 
> Signed-off-by: Ruediger Fichter <[email protected]>
> Signed-off-by: Jan von Wiarda <[email protected]>
> ---
>  hypervisor/arch/arm-common/uart-hscif.c | 7 +++++++
>  1 file changed, 7 insertions(+)
> 
> diff --git a/hypervisor/arch/arm-common/uart-hscif.c 
> b/hypervisor/arch/arm-common/uart-hscif.c
> index 4eb7534..ec38230 100644
> --- a/hypervisor/arch/arm-common/uart-hscif.c
> +++ b/hypervisor/arch/arm-common/uart-hscif.c
> @@ -28,9 +28,16 @@
>  
>  #define HSCIF_FIFO_SIZE                      128
>  
> +#define CON_CLOCK_STS_REG            0xe61501c4
> +
>  static void uart_init(struct uart_chip *chip)
>  {
>       u16 hsscr;
> +     void *clock_reg = (void*)(unsigned long)chip->debug_console->clock_reg;
> +     void *clock_sts_reg = (void*)(unsigned long)CON_CLOCK_STS_REG;
> +     unsigned int gate_nr = chip->debug_console->gate_nr;

Style nit: the short "u16 hsscr;" line should come after these.

> +
> +     mmio_write32(clock_reg, mmio_read32(clock_sts_reg) & ~(1 << gate_nr));
>  
>       if (chip->debug_console->divider) {
>               hsscr = mmio_read16(chip->virt_base + HSCIF_HSSCR);
> 

Jan
-- 
Siemens AG, Corporate Technology, CT RDA ITP SES-DE
Corporate Competence Center Embedded Linux

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