On Friday 06 April 2018 05:39 PM, Jan Kiszka wrote:
On 2018-04-06 13:33, Nikhil Devshatwar wrote:
Hi all,
I am writing a baremetal Jailhouse loader[1] on QEMU platform.
Right now SGIs are not working between CPU cores (possibly some GIC
config missing).
Means we are talking about bare-metal code running directly in QEMU, no
Jailhouse involved at that point, right?
I don't need SGIs in the jailhouse-loader baremetal app.
But when I am creating cells from jailhouse-loader, Jailhouse uses SGIs to kick
other CPU cores
The cell_create SVC call waits forever since the kicked CPU doesn't do anything.
Also, I picked up the psci series from Ralf[2] which has a psci-demo to
send SGIs from inmate.
With the CONFIG_BARE_METAL, I am able to build this as a baremetal
application.
This is the baremetal psci-demo application, No jailhouse involved here.
I am using this as reference as this is available in public.
Even with baremetal psci-demo application, I am facing the same issue
where the SGIs sent from one core do not fire interrupts on the other core.
Ralf confirmed that the same application works on real platforms, but
fails on QEMU.
Is there anything specific that I need to do to enable SGIs **specially
on QEMU**?
My QEMU cmdline is https://pastebin.ubuntu.com/p/BrvyCm88dS/
Also, as part of my debug, I enabled QEMU traces for GICv3 for Linux
kernel[3]
Even after reverse engineering[4] the traces and adding the
generated GIC config code[5] in the psci-demo, still no luck in getting
SGIs working.
I don't know somehow kernel is able to use SGIs but the baremetal app is
not.
Any help on this will be much appreciated.
How do the traces of the non-working bare-metal SGI transmission differ
from those issued by Linux guests?
Linux GIC driver does lots of read/writes [3] but the baremetal only does 4-5
register writes.
And then I would use gdb on qemu, stepping through the SGI transmission
code to see where it branches differently under bare-metal workload.
Usually, this reveals rather quickly why QEMU decides not to deliver
some interrupt because of bit X having the wrong value or state Y not
being reached.
Okay, I'll try stepping through the gic-v3 driver and try sending SGIs in
breakpoint to see when it hits other core.
Jan
[1]
https://gist.github.com/nikhildevshatwar/e17121c1355422a61fddaa52615fc7a9
[2] https://github.com/lfd/jailhouse/tree/arm-psci
[3] https://pastebin.ubuntu.com/p/jQKsshVJSp/
[4] https://pastebin.ubuntu.com/p/q7y64645v2/
[5] https://pastebin.ubuntu.com/p/RMwySvW4bK/
Thanks & Regards,
Nikhil Devshatwar
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