On 2018-05-18 20:50, Giovani Gracioli wrote:
> Hello,
>
> I have a BRAM and DRAM blocks available on the FPGA side of the ZCU102
> platform.
>
> I would like to make them accessible for jailhouse cells. For instance, a
> BRAM block is mapped to the 0xa0000000 address.
>
> To do that, I inserted this address into the root and non-root cell
> configurations as mem regions:
>
> Non-root:
>
> {
> .phys_start = 0x00A0000000,
> .virt_start = 0x00A0000000,
> .size = 0x200000, //2MB
> .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE
> },
>
> Root:
>
> {
> .phys_start = 0x00A0000000,
> .virt_start = 0x00A0000000,
> .size = 0x200000, //2MB
> .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE | JAILHOUSE_MEM_EXECUTE,
> },
>
> When I run the non-root cell and try to write into the address:
>
> int *bram_ptr = (int *) 0x00A0000000;
> *bram_ptr = 10;
>
> I got an unhandled data write at 0xa0000000. What am I missing here in the
> configs?
Maybe the region was not properly registered. Did you increase the
mem_regions array size? Did you change num_memory_regions so that it
requires manual updates? That's better discussed over the full config.
Note that, if you want to share a region between root and non-root cell,
the latter also needs JAILHOUSE_MEM_ROOTSHARED.
Jan
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