Not sure the situation of this, but I created a patch that provides PCI support
for arm (Jailhouse version 0.9.1). It is attached.
It is based on the Evidence's code. I tested it on the ultrascale+ (arm64).
It may be useful for some people.
Best
Giovani
> On 2018-04-18 21:52, Giovani Gracioli wrote:
> > Thanks Jan.
> >
> > It is working now. the irqchip in the non-root cell was missing.
>
> Good to hear!
>
> >
> > I added the following to the non-root cell:
> >
> > struct jailhouse_irqchip irqchips[1];
> > ...
> > .vpci_irq_base = 140-32
> > ...
> >
> > .irqchips = {
> > /* GIC */ {
> > .address = 0xf9010000,
> > .pin_base = 32,
> > .pin_bitmap = {
> > 1 << (54 - 32),
> > 0,
> > 0,
> > (1 << (140 - 128)) | (1 << (142 - 128))
> > },
> > },
> > },
>
> Yeah, configuration is nasty, many things have to be correct at the same
> time. That's why I pointed to the Linux demos as reference. Still, we
> need better tooling here.
>
> >
> > I attached here both configurations for those that want to use ivhsmem
> > interrupts in arm64. I would be happy to help to incorporate this working
> > demo into the master branch.
>
> Would be very welcome! Start with crafting a patch series and posting it
> for review.
>
> Jan
>
> --
> Siemens AG, Corporate Technology, CT RDA IOT SES-DE
> Corporate Competence Center Embedded Linux
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diff --git a/inmates/lib/arm-common/Makefile.lib b/inmates/lib/arm-common/Makefile.lib
index 669ff48..ee34b8c 100644
--- a/inmates/lib/arm-common/Makefile.lib
+++ b/inmates/lib/arm-common/Makefile.lib
@@ -37,8 +37,8 @@
#
objs-y := ../string.o ../cmdline.o ../setup.o ../alloc.o ../uart-8250.o
-objs-y += ../printk.o
-objs-y += printk.o gic.o mem.o timer.o setup.o uart.o
+objs-y += ../printk.o ../pci.o
+objs-y += printk.o gic.o mem.o timer.o setup.o uart.o pci.o
objs-y += uart-xuartps.o uart-mvebu.o uart-hscif.o uart-scifa.o uart-imx.o
objs-y += uart-pl011.o
objs-y += gic-v2.o gic-v3.o
diff --git a/inmates/lib/arm-common/include/inmate.h b/inmates/lib/arm-common/include/inmate.h
index 61e383a..159b889 100644
--- a/inmates/lib/arm-common/include/inmate.h
+++ b/inmates/lib/arm-common/include/inmate.h
@@ -106,9 +106,39 @@ void timer_start(u64 timeout);
void arch_mmu_enable(void);
+#define PCI_CFG_VENDOR_ID 0x000
+#define PCI_CFG_DEVICE_ID 0x002
+#define PCI_CFG_COMMAND 0x004
+# define PCI_CMD_IO (1 << 0)
+# define PCI_CMD_MEM (1 << 1)
+# define PCI_CMD_MASTER (1 << 2)
+# define PCI_CMD_INTX_OFF (1 << 10)
+#define PCI_CFG_STATUS 0x006
+# define PCI_STS_INT (1 << 3)
+# define PCI_STS_CAPS (1 << 4)
+#define PCI_CFG_BAR 0x010
+# define PCI_BAR_64BIT 0x4
+#define PCI_CFG_CAP_PTR 0x034
+
+#define PCI_ID_ANY 0xffff
+
+#define PCI_DEV_CLASS_OTHER 0xff
+
+#define PCI_CAP_MSI 0x05
+#define PCI_CAP_MSIX 0x11
+
+#define MSIX_CTRL_ENABLE 0x8000
+#define MSIX_CTRL_FMASK 0x4000
+
+u32 pci_read_config(u16 bdf, unsigned int addr, unsigned int size);
+void pci_write_config(u16 bdf, unsigned int addr, u32 value,
+ unsigned int size);
+int pci_find_device(u16 vendor, u16 device, u16 start_bdf);
+int pci_find_cap(u16 bdf, u16 cap);
+
#include <asm/processor.h>
#include <arch/inmate.h>
-#include <inmate_common.h>
+#include "../../include/inmate_common.h"
#endif /* !_JAILHOUSE_INMATE_H */
diff --git a/inmates/lib/arm-common/pci.c b/inmates/lib/arm-common/pci.c
new file mode 100644
index 0000000..f822f78
--- /dev/null
+++ b/inmates/lib/arm-common/pci.c
@@ -0,0 +1,34 @@
+#include <inmate.h>
+
+#define PCI_CFG_BASE 0xfc000000
+
+u32 pci_read_config(u16 bdf, unsigned int addr, unsigned int size)
+{
+ u64 reg_addr = PCI_CFG_BASE | ((u32)bdf << 8) | (addr & 0xfc);
+ switch (size) {
+ case 1:
+ return mmio_read8((u8 *)(reg_addr + (addr & 0x3)));
+ case 2:
+ return mmio_read16((u16 *)(reg_addr + (addr & 0x3)));
+ case 4:
+ return mmio_read32((u32 *)(reg_addr));
+ default:
+ return -1;
+ }
+}
+
+void pci_write_config(u16 bdf, unsigned int addr, u32 value, unsigned int size)
+{
+ u64 reg_addr = PCI_CFG_BASE | ((u32)bdf << 8) | (addr & 0xfc);
+ switch (size) {
+ case 1:
+ mmio_write8((u8 *)(reg_addr + (addr & 0x3)), value);
+ break;
+ case 2:
+ mmio_write16((u16 *)(reg_addr + (addr & 0x3)), value);
+ break;
+ case 4:
+ mmio_write32((u32 *)(reg_addr), value);
+ break;
+ }
+}
