Yeah, i forgot to set the flag and the .dtb file i was using wasn't the right one (now i am using inmate-zynqmp.dts). But even when i set the flag, it still gives me the same error. Send here the output of /proc/iomem:
00000000-3ecfffff : System RAM 00080000-00deffff : Kernel code 00e70000-01134fff : Kernel data 3ed00000-3ed3ffff : 3ed00000.ddr 3fd00000-5fffffff : System RAM 7c000000-7c3fffff : Jailhouse hypervisor fc000000-fc0fffff : PCI ECAM fc100000-fc101fff : //pci@0 fc100000-fc1000ff : 0000:00:00.0 And the config as it is now in attachment. sábado, 27 de Julho de 2019 às 13:57:31 UTC+1, Jan Kiszka escreveu: > > On 27.07.19 14:34, João Reis wrote: > > I reduced the kernel image to 90MB and the initramfs to 80MB. In the non > root > > cell config file, i declared a memory region with size 0x5fff000 > (~1.45GB) (send > > in attachment), and even when i issue "jailhouse cell linux > > ultra96-linux-demo.cell Image -d inmate-zynqmp-zcu102-2.dtb -i > rootfs.cpio -c > > "console=ttyS0, 115200" -k 4", it still gives me the error of no space > found to > > load all images. > > > > At least the config your attached contains no loadable RAM regions. > > Jan > > -- > -- You received this message because you are subscribed to the Google Groups "Jailhouse" group. To unsubscribe from this group and stop receiving emails from it, send an email to [email protected]. To view this discussion on the web visit https://groups.google.com/d/msgid/jailhouse-dev/edf7dab3-2c32-43bb-b13b-fce8bc452418%40googlegroups.com.
/* * Jailhouse, a Linux-based partitioning hypervisor * * Configuration for linux-demo inmate on Avnet Ultra96 board: * 2 CPUs, 128M RAM, serial port 2 * * Copyright (c) Siemens AG, 2014-2019 * * Authors: * Jan Kiszka <[email protected]> * * This work is licensed under the terms of the GNU GPL, version 2. See * the COPYING file in the top-level directory. */ #include <jailhouse/types.h> #include <jailhouse/cell-config.h> struct { struct jailhouse_cell_desc cell; __u64 cpus[1]; struct jailhouse_memory mem_regions[6]; struct jailhouse_irqchip irqchips[1]; struct jailhouse_pci_device pci_devices[1]; } __attribute__((packed)) config = { .cell = { .signature = JAILHOUSE_CELL_DESC_SIGNATURE, .revision = JAILHOUSE_CONFIG_REVISION, .name = "non-root", .flags = JAILHOUSE_CELL_PASSIVE_COMMREG,/* | JAILHOUSE_CELL_VIRTUAL_CONSOLE_ACTIVE,*/ .cpu_set_size = sizeof(config.cpus), .num_memory_regions = ARRAY_SIZE(config.mem_regions), .num_irqchips = ARRAY_SIZE(config.irqchips), .num_pci_devices = ARRAY_SIZE(config.pci_devices), .vpci_irq_base = 140-32, .console = { .address = 0xff010000, /*UART1*/ //.address = 0xff000000, /*UART0*/ //se eu meter uart0 da erro unhandled trap .type= JAILHOUSE_CON_TYPE_XUARTPS, .flags = JAILHOUSE_CON_ACCESS_MMIO | JAILHOUSE_CON_REGDIST_4, }, }, .cpus = { //0xe, //1110 //0x8, //1000 - fica com cpu3 0xc, //1100 }, .mem_regions = { /* UART */ { .phys_start = 0xff010000, .virt_start = 0xff010000, /*.phys_start = 0xff000000, .virt_start = 0xff000000,*/ .size = 0x1000, .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE | JAILHOUSE_MEM_IO | JAILHOUSE_MEM_ROOTSHARED, }, /* RAM */ { .phys_start = 0x3fd00000, .virt_start = 0x3fd00000, .size = 0x20300000, //must be page size aligned .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE | JAILHOUSE_MEM_EXECUTE | JAILHOUSE_MEM_LOADABLE,/* | JAILHOUSE_MEM_ROOTSHARED, *///se tirar JAILHOUSE_MEM_ROOTSHARED da exception fault 0x20 }, /* RAM */ { .phys_start = 0x7bef0000, .virt_start = 0x7bef0000, .size = 0x10000, .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE | JAILHOUSE_MEM_EXECUTE | JAILHOUSE_MEM_LOADABLE, }, /* RAM */ { .phys_start = 0x74000000, .virt_start = 0x74000000, .size = 0x7ef0000, .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE | JAILHOUSE_MEM_EXECUTE | JAILHOUSE_MEM_DMA | JAILHOUSE_MEM_LOADABLE, }, /* IVSHMEM shared memory region */ { .phys_start = 0x7bf00000, .virt_start = 0x7bf00000, .size = 0x100000, .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE | JAILHOUSE_MEM_ROOTSHARED, }, /* communication region */ { .virt_start = 0x80000000, .size = 0x00001000, .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE | JAILHOUSE_MEM_COMM_REGION, }, }, .irqchips = { /* GIC */ { .address = 0xf9010000, /* GICD base address - Display controller */ .pin_base = 32, /* The first irqchip starts at .pin_base=32 as the first 32 interrupts are reserved for SGIs and PPIs. */ .pin_bitmap = { //1 << (54 - 32), 1 << (53 - 32), // cat /proc/interrupts interrupt da UART0 AQUI ESTA A DIFERENÇA 0, 0, (1 << (140 - 128)) | (1 << (142 - 128)) //PL to PS interrupt signals 8 to 15. }, }, }, .pci_devices = { /* 00:00.0 */ { .type = JAILHOUSE_PCI_TYPE_IVSHMEM, .bdf = 0 << 3, // 00:00.0 .iommu = 1,// .bar_mask = { 0xffffff00, 0xffffffff, 0x00000000, 0x00000000, 0x00000000, 0x00000000, }, .shmem_region = 4, //.shmem_protocol = JAILHOUSE_SHMEM_PROTO_VETH, //.shmem_protocol = JAILHOUSE_SHMEM_PROTO_CUSTOM, .shmem_protocol = JAILHOUSE_SHMEM_PROTO_UNDEFINED, //.num_msix_vectors = 1, }, }, };
