I send in attachment root and non-root cell config files.
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/*
* Jailhouse, a Linux-based partitioning hypervisor
*
* Configuration for linux-demo inmate on Avnet Ultra96 board:
* 2 CPUs, 128M RAM, serial port 2
*
* Copyright (c) Siemens AG, 2014-2019
*
* Authors:
* Jan Kiszka <[email protected]>
*
* This work is licensed under the terms of the GNU GPL, version 2. See
* the COPYING file in the top-level directory.
*/
#include <jailhouse/types.h>
#include <jailhouse/cell-config.h>
struct {
struct jailhouse_cell_desc cell;
__u64 cpus[1];
struct jailhouse_memory mem_regions[6];
struct jailhouse_irqchip irqchips[1];
struct jailhouse_pci_device pci_devices[1];
} __attribute__((packed)) config = {
.cell = {
.signature = JAILHOUSE_CELL_DESC_SIGNATURE,
.revision = JAILHOUSE_CONFIG_REVISION,
.name = "non-root",
.flags = JAILHOUSE_CELL_PASSIVE_COMMREG,/* |
JAILHOUSE_CELL_VIRTUAL_CONSOLE_ACTIVE,*/
.cpu_set_size = sizeof(config.cpus),
.num_memory_regions = ARRAY_SIZE(config.mem_regions),
.num_irqchips = ARRAY_SIZE(config.irqchips),
.num_pci_devices = ARRAY_SIZE(config.pci_devices),
.vpci_irq_base = 140-32,
.console = {
.address = 0xff010000, /*UART1*/
//.address = 0xff000000, /*UART0*/ //se eu meter uart0 da erro unhandled trap
.type= JAILHOUSE_CON_TYPE_XUARTPS,
.flags = JAILHOUSE_CON_ACCESS_MMIO |
JAILHOUSE_CON_REGDIST_4,
},
},
.cpus = {
//0xe, //1110
//0x8, //1000 - fica com cpu3
0xc, //1100
},
.mem_regions = {
/* UART */ {
.phys_start = 0xff010000,
.virt_start = 0xff010000,
/*.phys_start = 0xff000000,
.virt_start = 0xff000000,*/
.size = 0x1000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
JAILHOUSE_MEM_IO | JAILHOUSE_MEM_ROOTSHARED,
},
/* RAM */ {
.phys_start = 0x40000000,
.virt_start = 0x40000000,
.size = 0x20000000, //must be page size aligned
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
JAILHOUSE_MEM_EXECUTE | JAILHOUSE_MEM_LOADABLE |
JAILHOUSE_MEM_DMA,/* |
JAILHOUSE_MEM_ROOTSHARED,*/ //se tirar JAILHOUSE_MEM_ROOTSHARED da exception fault 0x20
},
/* RAM */ {
.phys_start = 0x7bef0000,
.virt_start = 0x7bef0000,
.size = 0x10000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
JAILHOUSE_MEM_EXECUTE | JAILHOUSE_MEM_LOADABLE,
},
/* RAM */ {
.phys_start = 0x74000000,
.virt_start = 0x74000000,
.size = 0x7ef0000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
JAILHOUSE_MEM_EXECUTE | JAILHOUSE_MEM_DMA |
JAILHOUSE_MEM_LOADABLE,
},
/* IVSHMEM shared memory region */ {
.phys_start = 0x7bf00000,
.virt_start = 0x7bf00000,
.size = 0x100000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
JAILHOUSE_MEM_ROOTSHARED,
},
/* communication region */ {
.virt_start = 0x80000000,
.size = 0x00001000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
JAILHOUSE_MEM_COMM_REGION,
},
},
.irqchips = {
/* GIC */ {
.address = 0xf9010000, /* GICD base address - Display controller */
.pin_base = 32, /* The first irqchip starts at .pin_base=32 as the first 32 interrupts are
reserved for SGIs and PPIs. */
.pin_bitmap = {
//1 << (54 - 32),
1 << (53 - 32), // cat /proc/interrupts interrupt da UART0 AQUI ESTA A DIFERENÇA
0,
0,
(1 << (140 - 128)) | (1 << (142 - 128)) //PL to PS interrupt signals 8 to 15.
},
},
},
.pci_devices = {
/* 00:00.0 */ {
.type = JAILHOUSE_PCI_TYPE_IVSHMEM,
.bdf = 0 << 3, // 00:00.0
.iommu = 1,//
.bar_mask = {
0xffffff00, 0xffffffff, 0x00000000,
0x00000000, 0x00000000, 0x00000000,
},
.shmem_region = 4,
//.shmem_protocol = JAILHOUSE_SHMEM_PROTO_VETH,
//.shmem_protocol = JAILHOUSE_SHMEM_PROTO_CUSTOM,
.shmem_protocol = JAILHOUSE_SHMEM_PROTO_UNDEFINED,
//.num_msix_vectors = 1,
},
},
};
/*
* Jailhouse, a Linux-based partitioning hypervisor
*
* Configuration for Avnet Ultra96 board
*
* Copyright (c) Siemens AG, 2016-2019
*
* Authors:
* Jan Kiszka <[email protected]>
*
* This work is licensed under the terms of the GNU GPL, version 2. See
* the COPYING file in the top-level directory.
*/
#include <jailhouse/types.h>
#include <jailhouse/cell-config.h>
struct {
struct jailhouse_system header;
__u64 cpus[1];
struct jailhouse_memory mem_regions[3];
struct jailhouse_irqchip irqchips[1];
struct jailhouse_pci_device pci_devices[1];
} __attribute__((packed)) config = {
.header = {
.signature = JAILHOUSE_SYSTEM_SIGNATURE,
.revision = JAILHOUSE_CONFIG_REVISION,
.flags = JAILHOUSE_SYS_VIRTUAL_DEBUG_CONSOLE,
.hypervisor_memory = {
.phys_start = 0x7c000000,
.size = 0x00400000,
},
.debug_console = {
.address = 0xff010000,
.size = 0x1000,
.type = JAILHOUSE_CON_TYPE_XUARTPS,
.flags = JAILHOUSE_CON_ACCESS_MMIO |
JAILHOUSE_CON_REGDIST_4,
},
.platform_info = {
.pci_mmconfig_base = 0xfc000000,
.pci_mmconfig_end_bus = 0,
.pci_is_virtual = 1,
.arm = {
.gic_version = 2,
.gicd_base = 0xf9010000,
.gicc_base = 0xf902f000,
.gich_base = 0xf9040000,
.gicv_base = 0xf906f000,
.maintenance_irq = 25,
},
},
.root_cell = {
.name = "root",
.cpu_set_size = sizeof(config.cpus),
.num_memory_regions = ARRAY_SIZE(config.mem_regions),
.num_irqchips = ARRAY_SIZE(config.irqchips),
.num_pci_devices = ARRAY_SIZE(config.pci_devices),
.vpci_irq_base = 136-32,
},
},
.cpus = {
0xf,
},
.mem_regions = {
/* MMIO (permissive) */ {
.phys_start = 0xfd000000,
.virt_start = 0xfd000000,
.size = 0x03000000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
JAILHOUSE_MEM_IO,
},
/* RAM */ {
.phys_start = 0x0,
.virt_start = 0x0,
.size = 0x7c000000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
JAILHOUSE_MEM_EXECUTE,
},
/* IVSHMEM shared memory region for 00:00.0 */ {
.phys_start = 0x7bf00000,
.virt_start = 0x7bf00000,
.size = 0x100000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE,
},
},
.irqchips = {
/* GIC */ {
.address = 0xf9010000,
.pin_base = 32,
.pin_bitmap = {
0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff,
},
},
},
.pci_devices = {
/* 0001:00:00.0 */ {
.type = JAILHOUSE_PCI_TYPE_IVSHMEM,
.iommu = 1,//
//.domain = 1,
.bdf = 0 << 3,
.bar_mask = {
0xffffff00, 0xffffffff, 0x00000000,
0x00000000, 0x00000000, 0x00000000,
},
.shmem_region = 2,
//.shmem_protocol = JAILHOUSE_SHMEM_PROTO_VETH,
//.shmem_protocol = JAILHOUSE_SHMEM_PROTO_CUSTOM,
.shmem_protocol = JAILHOUSE_SHMEM_PROTO_UNDEFINED,
//.num_msix_vectors = 1,//se colocar isto, qd faço insmod uio_ivshmem.ko ele n diz "using jailhouse mode" e dps n existe /dev/uio1
},
},
};
