On 04.04.20 05:44, Michael Hinton wrote:
Hello,
I currently have a very simple application (no RTOS) running on a
single-core x86 inmate that is unaware of P-states. I am also running
with Hardware P-states (HWP) disabled on the Linux command line. When
the root cell gives control of the core over to the inmate, it's unclear
to me what happens to the P-state of that core. If it has an idle
P-state, and then is handed off to inmate, will it still be at the same
P-state? Or will it get reset to the full-throttle P0 P-state?
Jailhouse so far does nothing about power management, including
P-states. That's a to-do to handle that properly (reset, moderate access
etc.). Actually, access control will likely come first with the
introduction of MSR control (manageable whitelists of MSRs).
In my testing, my inmate appears to be running full throttle at the base
frequency, meaning that the P-state gets reset to P0 somehow. But I'm
not sure how to verify this beyond calculating the frequency with aperf
and mperf, which I'm doing.
What may happen here is that Linux reset the P-state when offline the
CPU for the handover.
I guess I could dive into the Linux source code to see what the
intel_pstate driver is doing, but I am a bit nervous that I might not
understand it. So I'm hoping someone here knows how this handoff works.
Maybe there is some kind of watchdog timer that needs to be actively
reset by the intel_pstate driver to keep a core at a P-state other than P0.
This necessary diving into the power management details of the various
targets (even Intel is not just one thing) is the reason for not having
anythings so far.
Jan
--
Siemens AG, Corporate Technology, CT RDA IOT SES-DE
Corporate Competence Center Embedded Linux
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