Jan,

> Subject: Re: [PATCH v2 00/46] arm64: Rework SMMUv2 support
> 
> On 14.10.20 10:28, Jan Kiszka wrote:
> > Changes in v2:
> >  - map 52-bit parange to 48
> >
> > That wasn't the plan when I started, but the more I dug into the
> > details and started to understand the hardware, the more issues I
> > found and the more dead code fragments from the Linux usage became
> visible.
> >
> > Highlights of the outcome:
> >  - Fix stall of SMMU due to unhandled stalled contexts (took me a while
> >    to understand that...)
> >  - Fix programming of CBn_TCR and TTBR
> >  - Fix TLB flush on cell exit
> >  - Fix bogus handling of Extended StreamID support
> >  - Do not pass-through unknown streams
> >  - Disable SMMU on shutdown
> >  - Reassign StreamIDs to the root cell
> >  - 225 insertions(+), 666 deletions(-)
> >
> > The code works as expected on the Ultra96-v2 here, but due to all the
> > time that went into the rework, I had no chance to bring up my MX8QM
> > so far. I'm fairly optimistic that things are not broken there as
> > well, but if they are, bisecting should be rather simple with this
> > series. So please test and review.
> >
> 
> Alice, Peng, already had a chance to review or test (ie. next)?

I gave a test, sometimes I met SDHC ADMA error when
`jailhouse enable imx8qm.cell`, sometimes it work well.

I suspect when during jailhouse enable phase, there might be
ongoing sdhc transactions not finished, not sure.

I have not find time to look into details.

Anyway, you could check in to master I think, we could address
the issue later when I have time.

Thanks,
Peng.

> 
> Jan
> 
> --
> Siemens AG, T RDA IOT
> Corporate Competence Center Embedded Linux

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