Branch: refs/heads/next
Home: https://github.com/siemens/jailhouse
Commit: 43eddb879307a83a4febe8ef261e1c0e8aa676c5
https://github.com/siemens/jailhouse/commit/43eddb879307a83a4febe8ef261e1c0e8aa676c5
Author: hongbo.wang <[email protected]>
Date: 2020-12-27 (Sun, 27 Dec 2020)
Changed paths:
A configs/arm64/ls1043a-rdb-inmate-demo.c
A configs/arm64/ls1043a-rdb-linux-demo.c
A configs/arm64/ls1043a-rdb.c
Log Message:
-----------
configs: ls1043a-rdb: add cell configure files
Add root cell, inmate cell, and Linux demo cell configure files
for NXP ls1043a RDB platform.
GIC base address of Rev1.1 are different with Rev1.0, default configure
files are for ls1043a RDB Rev1.1, if want to run jailhouse on Rev1.0,
should change to the following:
.gicd_base = 0x1401000,
.gicc_base = 0x1402000,
.gich_base = 0x1404000,
.gicv_base = 0x1406000,
/* irqchips GIC-400*/
.address = 0x1401000,
Signed-off-by: hongbo.wang <[email protected]>
Signed-off-by: Jan Kiszka <[email protected]>
Commit: a49bbb0bb01d80b932415e44dfbf5ce21829ba97
https://github.com/siemens/jailhouse/commit/a49bbb0bb01d80b932415e44dfbf5ce21829ba97
Author: hongbo.wang <[email protected]>
Date: 2020-12-27 (Sun, 27 Dec 2020)
Changed paths:
A configs/arm64/dts/inmate-ls1043a-rdb.dts
Log Message:
-----------
configs: ls1043a-rdb: Add linux inmate dts demo
Add device tree demo for running Linux as an inmate on
NXP ls1043a RDB board.
GIC base address of Rev1.1 are different with Rev1.0, default dts is for
ls1043a RDB Rev1.1, if want to run linux-demo on Rev1.0, should change
to the following:
gic: interrupt-controller@1400000 {
compatible = "arm,gic-400";
#interrupt-cells = <3>;
interrupt-controller;
reg = <0x0 0x1401000 0 0x1000>, /* GICD */
<0x0 0x1402000 0 0x2000>, /* GICC */
<0x0 0x1404000 0 0x2000>, /* GICH */
<0x0 0x1406000 0 0x2000>; /* GICV */
interrupts = <1 9 0xf08>;
};
Signed-off-by: hongbo.wang <[email protected]>
Signed-off-by: Jan Kiszka <[email protected]>
Commit: 1b4c2b27ccf2f873bc1e66e9b0182a76f1191a3c
https://github.com/siemens/jailhouse/commit/1b4c2b27ccf2f873bc1e66e9b0182a76f1191a3c
Author: Jan Kiszka <[email protected]>
Date: 2020-12-27 (Sun, 27 Dec 2020)
Changed paths:
M hypervisor/arch/arm/Makefile
Log Message:
-----------
arm: Enforce soft-float ABI
Required with newer gcc as we may otherwise "gain" vector instructions
that are not supported by Jailhouse. This is analogously to the kernel.
Signed-off-by: Jan Kiszka <[email protected]>
Commit: 5a9b08b44fd429feb90abcaa4fe01b1867f66225
https://github.com/siemens/jailhouse/commit/5a9b08b44fd429feb90abcaa4fe01b1867f66225
Author: Jan Kiszka <[email protected]>
Date: 2020-12-27 (Sun, 27 Dec 2020)
Changed paths:
M hypervisor/arch/arm/entry.S
Log Message:
-----------
arm: entry: Drop broken attempt to restore CPSR
This is neither the proper way to restor CPSR (we do not return to Linux
on error via eret) nor is this needed (no relevant change to CPSR done
if we return prior to switching to EL2). So drop this.
Signed-off-by: Jan Kiszka <[email protected]>
Commit: 9638d507b2f979e0c46a3b557372166408f91b20
https://github.com/siemens/jailhouse/commit/9638d507b2f979e0c46a3b557372166408f91b20
Author: Jan Kiszka <[email protected]>
Date: 2020-12-27 (Sun, 27 Dec 2020)
Changed paths:
M hypervisor/arch/arm/control.c
M hypervisor/arch/arm/mmio.c
M hypervisor/arch/arm/setup.c
M hypervisor/arch/arm/traps.c
Log Message:
-----------
arm: Fix access to SPSR from EL2
When in EL2, banked SPSR_hyp is not accessible. We rather want SPSR of
the current mode. For writing, that means appending fsxc which selects
all bits. Reading means dropping the bank suffix.
Noticed via QEMU. Real HW might have done the intended access so far.
Signed-off-by: Jan Kiszka <[email protected]>
Commit: 1c3a9508644c5f1d9fd5d6d0cdc8caf28c90b35c
https://github.com/siemens/jailhouse/commit/1c3a9508644c5f1d9fd5d6d0cdc8caf28c90b35c
Author: Jan Kiszka <[email protected]>
Date: 2020-12-27 (Sun, 27 Dec 2020)
Changed paths:
M inmates/Makefile
Log Message:
-----------
inmates: arm: Enforce soft-float ABI
Analogously to the hypervisor core: Our inmates do not set up vector
extensions, thus stumble if the compiler generates corresponding code.
Signed-off-by: Jan Kiszka <[email protected]>
Commit: 3cf261b06c63f165a48ad1671596e8eb7de4a3f0
https://github.com/siemens/jailhouse/commit/3cf261b06c63f165a48ad1671596e8eb7de4a3f0
Author: Jan Kiszka <[email protected]>
Date: 2020-12-27 (Sun, 27 Dec 2020)
Changed paths:
A configs/arm/dts/inmate-qemu-arm.dts
A configs/arm/qemu-arm-inmate-demo.c
A configs/arm/qemu-arm-linux-demo.c
A configs/arm/qemu-arm.c
Log Message:
-----------
configs: arm: Add QEMU target
Derived from the arm64 QEMU target, this adds one for 32-bit ARM which
also stresses the virtual GICv2. Works with QEMU 4.2.1 or newer.
Signed-off-by: Jan Kiszka <[email protected]>
Compare:
https://github.com/siemens/jailhouse/compare/d9f658ba17fc...3cf261b06c63
--
You received this message because you are subscribed to the Google Groups
"Jailhouse" group.
To unsubscribe from this group and stop receiving emails from it, send an email
to [email protected].
To view this discussion on the web visit
https://groups.google.com/d/msgid/jailhouse-dev/siemens/jailhouse/push/refs/heads/next/d9f658-3cf261%40github.com.
