Hi all,

I'm trying to create a setup in which every core is isolated (6 isolated 
cores). To this end, I've created 6 .cell files based on the apic-demo example. 
Each .cell file reserves a single core and a memory region. The RAM memory 
region has been assigned by dividing the biggest memory region available in 
sysconfig.cell into 6 same size parts. Each of the parts is assigned to a .cell 
file. The PIO regions have been left unaltered as in apic-demo. I am struggling 
with two problems when trying to start Jailhouse with our reqs.

The initialization of Jailhouse env is done correctly with
jailhouse enable sysconfig.cell

The first issue comes when trying to reserve core 0, which seems to be reserved 
for the Rootcell
jailhouse cell create core0-cell.cell
This command throws a JAILHOUSE_CELL_CREATE: Invalid argument error

Same thing happens if I try to load an app into the Rootcell by
jailhouse cell load Rootcell /path/to/inmates/apic-demo.bin
In this case the error is JAILHOUSE_CELL_LOAD: Invalid argument

The other issue happens when trying to assign a .bin file to any cell (for 
example in cell1)
The creation of the other cells (cores 1-5) works correctly:
jailhouse cell create core1-cell.cell
jailhouse cell create core2-cell.cell
jailhouse cell create core3-cell.cell
jailhouse cell create core4-cell.cell
jailhouse cell create core5-cell.cell

I've created a file (core1-app.c) which is a clone of apic-demo.c and compiled 
it with the Makefile in inmates. When trying to load it
jailhouse cell load core1-cell /path/to/inmates/core1-app.bin
the result is
WARNING: Overflow during MMIO region registration!
Cell "core1-cell" can be loaded
When starting the cell the following output is generated:
Started cell "core1-cell"
CPU 1 received SIPI, vector 100
FATAL: unable to get MMIO instruction
FATAL: Invalid MMIO/RAM read, addr: 0x0000000000000000 size: 0
RIP: 0x0000000000000000 RSP: 0x0000000000000000 FLAGS: 10002
RAX: 0x0000000000000000 RBX: 0x0000000000000000 RCX: 0x0000000000000000
RDX: 0x0000000000000000 RSI: 0x0000000000000000 RDI: 0x0000000000000000
CS: 0 BASE: 0x0000000000000000 AR-BYTES: 9b EFER.LMA 0
CR0: 0x0000000000000030 CR3: 0x0000000000000000 CR4: 0x0000000000002000
EFER: 0x0000000000000000
Parking CPU 1 (Cell: "core1-cell")

Essentially, the only difference in this scenario compared to apic-demo is the 
allocated RAM memory region and the core used (core 3 in apic-demo and core 1 
in ours). Any clue of what is wrong with this?

Thanks in advance for the attention,

Markel Sainz Oruna
HW eta Komunikazio Sistemak
Sistemas HW y de Comunicación
HW and communication systems


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