Signed-off-by: Ralf Ramsauer <[email protected]>
---
 configs/riscv/dts/noelv-linux-inmate.dts | 130 +++++++++++++++++++++++
 configs/riscv/noelv-linux-demo.c         | 101 ++++++++++++++++++
 2 files changed, 231 insertions(+)
 create mode 100644 configs/riscv/dts/noelv-linux-inmate.dts
 create mode 100644 configs/riscv/noelv-linux-demo.c

diff --git a/configs/riscv/dts/noelv-linux-inmate.dts 
b/configs/riscv/dts/noelv-linux-inmate.dts
new file mode 100644
index 00000000..486ea82f
--- /dev/null
+++ b/configs/riscv/dts/noelv-linux-inmate.dts
@@ -0,0 +1,130 @@
+/*
+ * Jailhouse, a Linux-based partitioning hypervisor
+ *
+ * Copyright (c) OTH Regensburg, 2022
+ *
+ * Authors:
+ *  Ralf Ramsauer <[email protected]>
+ *
+ * This work is licensed under the terms of the GNU GPL, version 2.  See
+ * the COPYING file in the top-level directory.
+ */
+
+/dts-v1/;
+/ {
+       model = "Jailhouse cell on RISC-V";
+
+       #address-cells = <2>;
+       #size-cells = <2>;
+
+       chosen {
+               stdout-path = "/soc/uart@fc001000:115200n8";
+               bootargs = "console=ttyGR0 earlycon=sbi";
+               linux,initrd-start = <0x82000000>;
+               linux,initrd-end = <0x82200000>;
+       };
+
+       memory@80000000 {
+               device_type = "memory";
+               reg = <0x00000000 0x80000000>, <0x00000000 0x4000000>;
+       };
+
+       cpus {
+               #address-cells = <1>;
+               #size-cells = <0>;
+               timebase-frequency = <0x989680>;
+
+               cpu@0 {
+                       device_type = "cpu";
+                       reg = <1>;
+                       status = "okay";
+                       compatible = "riscv";
+                       riscv,isa = "rv64imafdcsu";
+                       mmu-type = "riscv,sv39";
+
+                       cpu0_intc: interrupt-controller {
+                               #address-cells = <0>;
+                               #interrupt-cells = <1>;
+                               interrupt-controller;
+                               compatible = "riscv,cpu-intc";
+                       };
+               };
+
+               cpu@1 {
+                       device_type = "cpu";
+                       reg = <2>;
+                       status = "okay";
+                       compatible = "riscv";
+                       riscv,isa = "rv64imafdcsu";
+                       mmu-type = "riscv,sv39";
+
+                       cpu1_intc: interrupt-controller {
+                               #address-cells = <0>;
+                               #interrupt-cells = <1>;
+                               interrupt-controller;
+                               compatible = "riscv,cpu-intc";
+                       };
+               };
+
+               cpu@2 {
+                       device_type = "cpu";
+                       reg = <0>;
+                       status = "disabled";
+                       compatible = "riscv";
+                       riscv,isa = "rv64imafdcsu";
+                       mmu-type = "riscv,sv39";
+
+                       dummy_intc: interrupt-controller {
+                               #address-cells = <0>;
+                               #interrupt-cells = <1>;
+                               interrupt-controller;
+                               compatible = "riscv,cpu-intc";
+                       };
+               };
+       };
+       soc {
+               #address-cells = <2>;
+               #size-cells = <2>;
+               compatible = "simple-bus";
+               ranges;
+
+               sysclock: sysclock {
+                       #clock-cells = <0>;
+                       compatible = "fixed-clock";
+                       clock-frequency = <100000000>;
+               };
+
+               uart0: uart@fc001000 {
+                       compatible = "gaisler,apbuart";
+                       reg = <0x00 0xfc001000 0x00 0x100>;
+                       clocks = <&sysclock>;
+                       current-speed = <115200>;
+                       interrupt-parent = <&plic0>;
+                       interrupts = <1>;
+               };
+
+               plic0: plic@f8000000 {
+                       #address-cells = <0x00>;
+                       #interrupt-cells = <0x01>;
+                       compatible = "riscv,plic0";
+                       interrupt-controller;
+                       reg = <0x00 0xf8000000 0x00 0x4000000>;
+                       interrupts-extended = <
+                               &dummy_intc 11
+                               &dummy_intc 9
+                               &dummy_intc 8
+                               &dummy_intc 10
+                               &cpu0_intc 11
+                               &cpu0_intc 9
+                               &cpu0_intc 8
+                               &cpu0_intc 10
+                               &cpu1_intc 11
+                               &cpu1_intc 9
+                               &cpu1_intc 8
+                               &cpu1_intc 10
+                       >;
+                       riscv,ndev = <31>;
+                       riscv,max-priority = <7>;
+               };
+       };
+};
diff --git a/configs/riscv/noelv-linux-demo.c b/configs/riscv/noelv-linux-demo.c
new file mode 100644
index 00000000..bd263b78
--- /dev/null
+++ b/configs/riscv/noelv-linux-demo.c
@@ -0,0 +1,101 @@
+/*
+ * Jailhouse, a Linux-based partitioning hypervisor
+ *
+ * Configuration for RISC-V Linux inmate on NOEL-V
+ *
+ * Copyright (c) OTH Regensburg 2022
+ *
+ * Authors:
+ *  Ralf Ramsauer <[email protected]>
+ *
+ * This work is licensed under the terms of the GNU GPL, version 2.  See
+ * the COPYING file in the top-level directory.
+ */
+
+#include <jailhouse/types.h>
+#include <jailhouse/cell-config.h>
+
+struct {
+       struct jailhouse_cell_desc cell;
+       struct jailhouse_cpu cpus[2];
+       struct jailhouse_memory mem_regions[8];
+       struct jailhouse_irqchip irqchips[1];
+       struct jailhouse_pci_device pci_devices[0];
+} __attribute__((packed)) config = {
+       .cell = {
+               .signature = JAILHOUSE_CELL_DESC_SIGNATURE,
+               .revision = JAILHOUSE_CONFIG_REVISION,
+               .name = "linux-demo",
+               .flags = JAILHOUSE_CELL_PASSIVE_COMMREG |
+                       JAILHOUSE_CELL_TEST_DEVICE |
+                       JAILHOUSE_CELL_VIRTUAL_CONSOLE_PERMITTED,
+
+               .num_cpus = ARRAY_SIZE(config.cpus),
+               .num_memory_regions = ARRAY_SIZE(config.mem_regions),
+               .num_pci_devices = ARRAY_SIZE(config.pci_devices),
+               .num_irqchips = ARRAY_SIZE(config.irqchips),
+
+               /*
+                * This IRQ must be BELOW the .riscv.plic.max_irq, as
+                * Linux won't address any higher IRQ
+                */
+               .vpci_irq_base = 28,
+       },
+
+       .cpus = {
+               {
+                       .phys_id = 1,
+               },
+               {
+                       .phys_id = 2,
+               },
+       },
+
+       .mem_regions = {
+               /* RAM low */ {
+                       .phys_start = 0x3fa00000,
+                       .virt_start = 0x0,
+                       .size = 0x100000,
+                       .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
+                               JAILHOUSE_MEM_EXECUTE | JAILHOUSE_MEM_LOADABLE,
+               },
+               /* communication region */ {
+                       .virt_start = 0x00100000,
+                       .size = 0x00001000,
+                       .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
+                               JAILHOUSE_MEM_COMM_REGION,
+               },
+               /* RAM high */ {
+                       .phys_start = 0x3ba00000,
+                       .virt_start = 0x80000000,
+                       .size = 0x4000000,
+                       .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
+                               JAILHOUSE_MEM_EXECUTE | JAILHOUSE_MEM_LOADABLE,
+               },
+               /* uart@fc001000 */ {
+                       .phys_start = 0xfc001000,
+                       .virt_start = 0xfc001000,
+                       .size = 0x1000,
+                       .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
+                               JAILHOUSE_MEM_IO | JAILHOUSE_MEM_ROOTSHARED,
+               },
+               /* IVSHMEM shared memory regions (networking) */
+               JAILHOUSE_SHMEM_NET_REGIONS(0x3fb00000, 1),
+       },
+
+       .pci_devices = {
+       },
+
+       .irqchips = {
+               /* PLIC */ {
+                       .address = 0xf8000000,
+                       .pin_base = 0,
+                       .pin_bitmap = {
+                               (1 << 1), /* UART */
+                               0,
+                               0,
+                               0,
+                       },
+               },
+       },
+};
-- 
2.36.1

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