Hi All, I would be very grateful, if anyone could explain how Jailhouse on ARM64 architectures uses the 2nd stage MMU translation.
It does look like Jailhouse uses the 2nd stage MMU translations - for example, t is easy to find in the code where such registers as VTCR_EL2 and VTTBR_EL2 are set. I am guessing that Jailhouse, as one would expect from a hypervisor, uses 2nd stage translation to protect VMs (cells) from accessing each others memory (unless a memory region is explicitly shared with a root cell by specifying JAILHOUSE_MEM_ROOTSHARED). Is that so? Could anyone confirm? How is IPA<->PA mapping is done for VMs? Is it 1-to-1 mapping (so that, in fact, PA equals IPA)? Thank you very much in advance Best Regards, Yelena -- You received this message because you are subscribed to the Google Groups "Jailhouse" group. To unsubscribe from this group and stop receiving emails from it, send an email to [email protected]. To view this discussion on the web visit https://groups.google.com/d/msgid/jailhouse-dev/436612cf-fed1-4b6b-97a4-29683433c8e3n%40googlegroups.com.
