Hi Eur,
Eur van Andel wrote: >>>>> OPTION_REG_T0CS = off >>> Only for 10F's, but it should go into the device files, and into the >>> enable_dig_io() procedure. [RobH >> But in the meantime I've done some datasheet scanning and think it is >> also useful for the 12F508,509 and 16F505 (maybe even more). Please >> check. [Eur] > Confirmed. Also for PIC12F510, PIC16F506, PIC16F526. > > Not for the 12F609, 12F615, 12F629, 12F635, 12F636, 12F639 or 12F675. > Also not for the PIC16F5X. > I have updated the device files according to this discussion. But I'm not convinced it is all OK. What confuses me: The reason for resetting T0CS is to make sure the pin is available for digital output. When the T0CS bit is set (which is the default) Timer0 is in counter mode and one of the pins is the input for the counter. But we have the reset of T0CS limited to chips for which this bit overrides the TRIS bit for this pin. Is for the other chips that pin still output and has the corresponding TRIS bit to be reset as well to make it really input? In other words is for the Timer0 to work in counter-mode both setting T0CS bit and reset of the corresponding TRIS bit required? The datasheets (e.g. for the 12F675) don't mention this TRIS requirement. Please explain why the chips in the list above do _not_ need T0CS to be reset. Regards, Rob. -- Rob Hamerling, Vianen, NL (http://www.robh.nl/) --~--~---------~--~----~------------~-------~--~----~ You received this message because you are subscribed to the Google Groups "jallib" group. To post to this group, send email to [email protected] To unsubscribe from this group, send email to [EMAIL PROTECTED] For more options, visit this group at http://groups.google.com/group/jallib?hl=en -~----------~----~----~----~------~----~------~--~---
